KS8893ML MICREL [Micrel Semiconductor], KS8893ML Datasheet - Page 39
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KS8893ML
Manufacturer Part Number
KS8893ML
Description
Integrated 3-Port 10/100 Managed Switch with PHYs Preliminary Data Sheet Rev. 1.0
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
1.KS8893ML.pdf
(106 pages)
- Current page: 39 of 106
- Download datasheet (650Kb)
For packets from regular ports (port 1 & port 2) to port 3, the port mask is used to tell the processor which port the
packets were received on, defined as follows:
No port mask values, other than the previous two defined ones, should be received in this direction in Special
Tagging Mode. The switch to processor egress rules are defined as follows:
IGMP Support
For Internet Group Management Protocol (IGMP) support in layer 2, the KS8893M provides two components:
IGMP Snooping
The KS8893M traps IGMP packets and forwards them only to the processor (port 3). The IGMP packets are
identified as IP packets (either Ethernet IP packets, or IEEE 802.3 SNAP IP packets) with IP version = 0x4 and
protocol version number = 0x2.
Multicast Address Insertion in the Static MAC Table
Once the multicast address is programmed in the Static MAC Table, the multicast session is trimmed to the
subscribed ports, instead of broadcasting to all ports.
To enable IGMP support, set register 5 bit [6] to ‘1’. Also, Special Tagging Mode needs to be enabled, so that the
processor knows which port the IGMP packet was received on. This is achieved by setting both register 11 bit [0]
and register 48 bit [2] to ‘1’.
IPv6 MLD Snooping
The KS8893M traps IPv6 Multicast Listener Discovery (MLD) packets and forwards them only to the processor
(port 3). MLD snooping is controlled by register 5 bit 5 (MLD snooping enable) and register 5 bit 4 (MLD option).
With MLD snooping enabled, the KS8893M traps packets that meet all of the following conditions:
If the MLD option bit is set to “1”, the KS8893M traps packets with the following additional condition:
For MLD snooping, Special Tagging Mode also needs to be enabled, so that the processor knows which port the
MLD packet was received on. This is achieved by setting both register 11 bit [0] and register 48 bit [2] to ‘1’.
June 2005
“0001”, packet from port 1
“0010”, packet from port 2
Ingress Packets
Tagged with 0x8100 + TCI
Not tagged.
•
•
•
•
IPv6 multicast packets
Hop count limit = 1
IPv6 next header = 1 or 58 (or = 0 with hop-by-hop next header = 1 or 58)
IPv6 next header = 43, 44, 50, 51, or 60 (or = 0 with hop-by-hop next header = 43, 44, 50, 51, or
60)
Table 12. STPID Egress Rules (Switch Port 3 to Processor)
Egress Action to Tag Field
- Modify TPID to 0x810 + “port mask”, which indicates source port.
- No change to TCI if VID is not null
- Replace null VID with ingress port VID
- Recalculate CRC
- Insert TPID to 0x810 + “port mask”, which indicates source port
- Insert TCI with ingress port VID
- Recalculate CRC
39
M9999-063005
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