KS8893ML MICREL [Micrel Semiconductor], KS8893ML Datasheet - Page 97
![no-image](/images/no-image-200.jpg)
KS8893ML
Manufacturer Part Number
KS8893ML
Description
Integrated 3-Port 10/100 Managed Switch with PHYs Preliminary Data Sheet Rev. 1.0
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
1.KS8893ML.pdf
(106 pages)
- Current page: 97 of 106
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MII Timing
MAC Mode MII Timing
June 2005
Timing Parameter
tcyc3
(100BASE-TX)
tcyc3
(10BASE-T)
ts3
th3
tov3
M R X D [ 3 : 0 ]
M R X C L K
R e c e i v e
M R X D V
T i m i n g
Figure 18. MAC Mode MII Timing – Data Received from MII
Clock cycle
100BASE-TX
Clock cycle
10BASE-T
Setup time
Hold time
Output valid
Description
Figure 19. MAC Mode MII Timing – Data Input to MII
t
s 3
Table 25. MAC Mode MII Timing Parameters
t
cyc3
Min
10
10
0
97
Typ
400
40
Max
25
t
h 3
Unit
ns
ns
ns
ns
ns
M9999-063005
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