PIC24FJ16GA MICROCHIP [Microchip Technology], PIC24FJ16GA Datasheet - Page 188

• Manufacturer Part Number: PIC24FJ16GA
• Description: 28/44-Pin General Purpose, 16-Bit Flash Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

PIC24FJ64GA004 FAMILY
REGISTER 20-2:
DS39881C-page 186
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-11
bit 10
bit 9-8
bit 7
bit 6
bit 5-2
bit 1
bit 0
VCFG2
R/W-0
BUFS
R-0
VCFG2:VCFG0: Voltage Reference Configuration bits
Unimplemented: Read as ‘0’
CSCNA: Scan Input Selections for CH0+ S/H Input for MUX A Input Multiplexer Setting bit
1 = Scan inputs
0 = Do not scan inputs
Unimplemented: Read as ‘0’
BUFS: Buffer Fill Status bit (valid only when BUFM = 1)
1 = A/D is currently filling buffer 08-0F, user should access data in 00-07
0 = A/D is currently filling buffer 00-07, user should access data in 08-0F
Unimplemented: Read as ‘0’
SMPI3:SMPI0: Sample/Convert Sequences Per Interrupt Selection bits
1111 = Interrupts at the completion of conversion for each 16th sample/convert sequence
1110 = Interrupts at the completion of conversion for each 15th sample/convert sequence
.....
0001 = Interrupts at the completion of conversion for each 2nd sample/convert sequence
0000 = Interrupts at the completion of conversion for each sample/convert sequence
BUFM: Buffer Mode Select bit
1 = Buffer configured as two 8-word buffers (ADC1BUFn<15:8> and ADC1BUFn<7:0>)
0 = Buffer configured as one 16-word buffer (ADC1BUFn<15:0>)
ALTS: Alternate Input Sample Mode Select bit
1 = Uses MUX A input multiplexer settings for first sample, then alternates between MUX B and
0 = Always uses MUX A input multiplexer settings
VCFG1
R/W-0
VCFG2:VCFG0
MUX A input multiplexer settings for all subsequent samples
U-0
—
AD1CON2: A/D CONTROL REGISTER 2
*
000
001
010
011
1xx
AV
W = Writable bit
‘1’ = Bit is set
DD
VCFG0
SMPI3
and AV
R/W-0
R/W-0
SS
inputs are tied to V
SMPI2
R/W-0
R/W-0
External V
External V
—
Preliminary
AV
AV
AV
V
R
DD
DD
DD
+
REF
REF
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
*
*
*
DD
SMPI1
+ pin
+ pin
R/W-0
U-0
—
and V
SS
on 28-pin devices.
CSCNA
SMPI0
R/W-0
R/W-0
External V
External V
© 2008 Microchip Technology Inc.
x = Bit is unknown
R/W-0
BUFM
AV
AV
AV
U-0
—
V
R
SS
SS
SS
-
REF
REF
*
*
*
- pin
- pin
R/W-0
ALTS
U-0
—
bit 8
bit 0