PIC24FJ16GA MICROCHIP [Microchip Technology], PIC24FJ16GA Datasheet - Page 49

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PIC24FJ16GA

Manufacturer Part Number
PIC24FJ16GA
Description
28/44-Pin General Purpose, 16-Bit Flash Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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5.0
The Reset module combines all Reset sources and
controls the device Master Reset Signal, SYSRST. The
following is a list of device Reset sources:
• POR: Power-on Reset
• MCLR: Pin Reset
• SWR: RESET Instruction
• WDT: Watchdog Timer Reset
• BOR: Brown-out Reset
• CM: Configuration Mismatch Reset
• TRAPR: Trap Conflict Reset
• IOPUWR: Illegal Opcode Reset
• UWR: Uninitialized W Register Reset
A simplified block diagram of the Reset module is
shown in Figure 5-1.
FIGURE 5-1:
© 2008 Microchip Technology Inc.
Note:
RESETS
MCLR
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
”Section 7. Reset” (DS39712).
V
Enable Voltage Regulator
DD
Uninitialized W Register
Configuration Mismatch
Illegal Opcode
Family
RESET SYSTEM BLOCK DIAGRAM
Trap Conflict
Sleep or Idle
Brown-out
V
RESET
Instruction
Module
Detect
DD
WDT
Reset
Rise
Reference
Glitch Filter
Manual”,
PIC24FJ64GA004 FAMILY
POR
Preliminary
BOR
Any active source of Reset will make the SYSRST
signal active. Many registers associated with the CPU
and peripherals are forced to a known Reset state.
Most registers are unaffected by a Reset; their status is
unknown on POR and unchanged by all other Resets.
All types of device Reset will set a corresponding status
bit in the RCON register to indicate the type of Reset
(see Register 5-1). A Power-on Reset will clear all bits
except for the BOR and POR bits (RCON<1:0>) which
are set. The user may set or clear any bit at any time
during code execution. The RCON bits only serve as
status bits. Setting a particular Reset status bit in
software will not cause a device Reset to occur.
The RCON register also has other bits associated with
the Watchdog Timer and device power-saving states.
The function of these bits is discussed in other sections
of this manual.
Note:
Note:
Refer to the specific peripheral or CPU
section of this manual for register Reset
states.
The status bits in the RCON register
should be cleared after they are read so
that the next RCON register value after a
device Reset will be meaningful.
DS39881C-page 47
SYSRST

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