PIC24FJ32GB002-E/ML MICROCHIP [Microchip Technology], PIC24FJ32GB002-E/ML Datasheet - Page 173
![no-image](/images/no-image-200.jpg)
PIC24FJ32GB002-E/ML
Manufacturer Part Number
PIC24FJ32GB002-E/ML
Description
28/44-Pin, 16-Bit, Flash Microcontrollers with USB On-The-Go (OTG) and nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC24FJ32GB002-EML.pdf
(352 pages)
- Current page: 173 of 352
- Download datasheet (3Mb)
To set up the SPI module for the Enhanced Buffer
Master mode of operation:
1.
2.
3.
4.
5.
6.
FIGURE 15-2:
2010 Microchip Technology Inc.
SSx/FSYNCx
If using interrupts:
a)
b)
c)
Write the desired settings to the SPIxCON1 and
SPIxCON2
(SPIxCON1<5>) = 1.
Clear the SPIROV bit (SPIxSTAT<6>).
Select Enhanced Buffer mode by setting the
SPIBEN bit (SPIxCON2<0>).
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
Write the data to be transmitted to the SPIxBUF
register. Transmission (and reception) will start
as soon as data is written to the SPIxBUF
register.
SDOx
SCKx
SDIx
Clear the SPIxIF bit in the respective IFS
register.
Set the SPIxIE bit in the respective IEC
register.
Write the SPIxIP bits in the respective IPC
register.
Read SPIxBUF
Control
registers
Sync
Transfer
SPIx MODULE BLOCK DIAGRAM (ENHANCED MODE)
Receive Buffer
8-Level FIFO
bit 0
with
SPIxSR
Control
Clock
SPIxBUF
Shift Control
Transmit Buffer
8-Level FIFO
MSTEN
PIC24FJ64GB004 FAMILY
Transfer
Write SPIxBUF
Select
Edge
To set up the SPI module for the Enhanced Buffer
Slave mode of operation:
1.
2.
3.
4.
5.
6.
7.
8.
16
Clear the SPIxBUF register.
If using interrupts:
a)
b)
c)
Write the desired settings to the SPIxCON1 and
SPIxCON2
(SPIxCON1<5>) = 0.
Clear the SMP bit.
If the CKE bit is set, then the SSEN bit must be
set, thus enabling the SSx pin.
Clear the SPIROV bit (SPIxSTAT<6>).
Select Enhanced Buffer mode by setting the
SPIBEN bit (SPIxCON2<0>).
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
Secondary
1:1 to 1:8
Prescaler
Clear the SPIxIF bit in the respective IFS
register.
Set the SPIxIE bit in the respective IEC
register.
Write the SPIxIP bits in the respective IPC
register to set the interrupt priority.
Internal Data Bus
registers
1:1/4/16/64
Prescaler
Primary
with
DS39940D-page 173
SPIxCON1<1:0>
SPIxCON1<4:2>
Enable
Master Clock
F
CY
MSTEN
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