PIC24FJ32GB002-E/ML MICROCHIP [Microchip Technology], PIC24FJ32GB002-E/ML Datasheet - Page 262
![no-image](/images/no-image-200.jpg)
PIC24FJ32GB002-E/ML
Manufacturer Part Number
PIC24FJ32GB002-E/ML
Description
28/44-Pin, 16-Bit, Flash Microcontrollers with USB On-The-Go (OTG) and nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC24FJ32GB002-EML.pdf
(352 pages)
- Current page: 262 of 352
- Download datasheet (3Mb)
PIC24FJ64GB004 FAMILY
REGISTER 22-2:
DS39940D-page 262
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5-2
bit 1
bit 0
VCFG2
R/W-0
BUFS
R-0
VCFG<2:0>: Voltage Reference Configuration bits
Reserved: Maintain as ‘0’
Unimplemented: Read as ‘0’
CSCNA: Scan Input Selections for CH0+ S/H Input for MUX A Input Multiplexer Setting bit
1 = Scan inputs
0 = Do not scan inputs
Unimplemented: Read as ‘0’
BUFS: Buffer Fill Status bit (valid only when BUFM = 1)
1 = A/D is currently filling buffer 08-0F; user should access data in 00-07
0 = A/D is currently filling buffer 00-07; user should access data in 08-0F
Unimplemented: Read as ‘0’
SMPI<3:0>: Sample/Convert Sequences Per Interrupt Selection bits
1111 = Interrupts are at the completion of conversion for each 16th sample/convert sequence
1110 = Interrupts are at the completion of conversion for each 15th sample/convert sequence
.....
0001 = Interrupts are at the completion of conversion for each 2nd sample/convert sequence
0000 = Interrupts are at the completion of conversion for each sample/convert sequence
BUFM: Buffer Mode Select bit
1 = Buffer is configured as two 8-word buffers (ADC1BUFn<15:8> and ADC1BUFn<7:0>)
0 = Buffer is configured as one 16-word buffer (ADC1BUFn<15:0>)
ALTS: Alternate Input Sample Mode Select bit
1 = Uses MUX A input multiplexer settings for first sample, then alternates between MUX B and
0 = Always uses MUX A input multiplexer settings
VCFG1
R/W-0
MUX A input multiplexer settings for all subsequent samples
U-0
—
VCFG<2:0>
AD1CON2: A/D CONTROL REGISTER 2
000
001
010
011
1xx
r = Reserved bit
W = Writable bit
‘1’ = Bit is set
VCFG0
SMPI3
R/W-0
R/W-0
External V
External V
SMPI2
R/W-0
r-0
r
AV
AV
AV
V
R
DD
DD
DD
+
REF
REF
+ pin
+ pin
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SMPI1
R/W-0
U-0
—
External V
External V
CSCNA
SMPI0
R/W-0
R/W-0
AV
AV
AV
V
R
SS
SS
SS
-
REF
REF
2010 Microchip Technology Inc.
- pin
- pin
x = Bit is unknown
R/W-0
BUFM
U-0
—
R/W-0
ALTS
U-0
—
bit 8
bit 0
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