DSPIC30F2011 MICROCHIP [Microchip Technology], DSPIC30F2011 Datasheet - Page 161

• Manufacturer Part Number: DSPIC30F2011
• Description: High-Performance Digital Signal Controllers
• Manufacturer: MICROCHIP [Microchip Technology]

TABLE 20-15: PLL CLOCK TIMING SPECIFICATIONS (V
TABLE 20-16: INTERNAL CLOCK TIMING EXAMPLES
© 2005 Microchip Technology Inc.
AC CHARACTERISTICS
OS50
OS51
OS52
OS53
Note 1:
Note 1:
Param
No.
Oscillator
Clock
Mode
2:
2:
3:
EC
XT
F
F
T
D
Symbol
PLLI
SYS
LOC
These parameters are characterized but not tested in manufacturing.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and
are not tested.
Assumption: Oscillator Postscaler is divide by 1.
Instruction Execution Cycle Time: T
Instruction Execution Frequency: MIPS = (F
cycle].
CLK
PLL Input Frequency Range
On-chip PLL Output
PLL Start-up Time (Lock Time)
CLKOUT Stability (Jitter)
(MHz)
0.200
F
OSC
10
25
10
4
4
Characteristic
(1)
T
CY
dsPIC30F2011/2012/3012/3013
( sec)
20.0
0.16
(2)
1.0
0.4
1.0
0.4
Standard Operating Conditions: 2.5V to 5.5V
(unless otherwise stated)
Operating temperature
(1)
(2)
CY
(2)
= 1 / MIPS.
Preliminary
w/o PLL
OSC
MIPS
TBD
Min
16
—
0.05
6.25
4
1.0
2.5
1.0
2.5
* PLLx) / 4 [since there are 4 Q clocks per instruction
(3)
Typ
20
—
—
1
DD
-40°C T
-40°C
(2)
= 2.5 TO 5.5 V)
w PLL x4
MIPS
10.0
10.0
Max
TBD
4.0
4.0
120
—
—
10
50
T
A
A
(3)
+85°C for Industrial
+125°C for Extended
Units
MHz EC, XT modes with PLL
MHz EC, XT modes with PLL
%
s
w PLL x8
MIPS
Measured over 100 ms
period
20.0
20.0
8.0
8.0
—
—
(3)
Conditions
DS70139C-page 159
w PLL x16
MIPS
16.0
16.0
—
—
—
—
(3)