DSPIC30F2011 MICROCHIP [Microchip Technology], DSPIC30F2011 Datasheet - Page 199

• Manufacturer Part Number: DSPIC30F2011
• Description: High-Performance Digital Signal Controllers
• Manufacturer: MICROCHIP [Microchip Technology]

Input Capture Operation During Sleep and Idle Modes ...... 82
Input Capture Timing Requirements ................................. 168
Input Change Notification Module ....................................... 61
Instruction Addressing Modes............................................. 41
Instruction Set
Internal Clock Timing Examples ....................................... 159
Internet Address................................................................ 201
Interrupt Controller
Interrupt Priority .................................................................. 64
Interrupt Sequence ............................................................. 67
Interrupts ............................................................................. 63
L
Load Conditions ................................................................ 157
Low Voltage Detect (LVD) ................................................ 127
Low-Voltage Detect Characteristics .................................. 154
LVDL Characteristics ........................................................ 155
M
Memory Organization.......................................................... 27
Microchip Internet Web Site .............................................. 201
Modulo Addressing ............................................................. 42
MPLAB ASM30 Assembler, Linker, Librarian ................... 140
MPLAB ICD 2 In-Circuit Debugger ................................... 141
MPLAB ICE 2000 High-Performance Universal
MPLAB ICE 4000 High-Performance Universal
MPLAB Integrated Development Environment
MPLINK Object Linker/MPLIB Object Librarian ................ 140
N
NVM
O
OC/PWM Module Timing Characteristics.......................... 169
Operating Current (I
Operating Frequency vs Voltage
Oscillator
© 2005 Microchip Technology Inc.
CPU Idle Mode............................................................ 82
CPU Sleep Mode ........................................................ 82
dsPIC30F2012/3013 Register Map (Bits 7-0) ............. 61
File Register Instructions ............................................ 41
Fundamental Modes Supported.................................. 41
MAC Instructions......................................................... 42
MCU Instructions ........................................................ 41
Move and Accumulator Instructions............................ 42
Other Instructions........................................................ 42
Overview ................................................................... 134
Summary................................................................... 131
Register Map......................................................... 69, 70
Traps........................................................................... 65
Interrupt Stack Frame ................................................. 67
Core Register Map...................................................... 37
Applicability ................................................................. 44
Incrementing Buffer Operation Example..................... 43
Start and End Address................................................ 43
W Address Register Selection .................................... 43
In-Circuit Emulator .................................................... 141
In-Circuit Emulator .................................................... 141
Software.................................................................... 139
Register Map............................................................... 51
dsPIC30FXXXX-20 (Extended)................................. 145
Configurations........................................................... 120
Fail-Safe Clock Monitor .................................... 122
Fast RC (FRC) .................................................. 121
Initial Clock Source Selection ........................... 120
Low Power RC (LPRC) ..................................... 121
DD
)..................................................... 147
dsPIC30F2011/2012/3012/3013
Preliminary
Oscillator Selection ........................................................... 117
Oscillator Start-up Timer
Output Compare Interrupts ................................................. 87
Output Compare Module .................................................... 85
Output Compare Operation During CPU Idle Mode ........... 87
Output Compare Sleep Mode Operation ............................ 87
P
Packaging Information ...................................................... 187
Peripheral Module Disable (PMD) Registers .................... 129
PICkit 1 Flash Starter Kit .................................................. 143
PICSTART Plus Development Programmer..................... 141
Pinout Descriptions............................................................. 14
PLL Clock Timing Specifications ...................................... 159
POR. See Power-on Reset.
Port Write/Read Example ................................................... 58
PORTB
PORTC
PORTD
PORTF
Power Saving Modes........................................................ 127
Power-Down Current (I
Power-up Timer
PRO MATE II Universal Device Programmer ................... 141
Program Address Space..................................................... 27
Program and EEPROM Characteristics............................ 156
Program Counter ................................................................ 18
Programmable .................................................................. 117
Operating Modes (Table).......................................... 118
System Overview...................................................... 117
Timing Characteristics .............................................. 163
Timing Requirements ............................................... 164
Register Map .............................................................. 88
Timing Characteristics .............................................. 168
Timing Requirements ............................................... 168
Marking............................................................. 187, 188
Register Map for dsPIC30F2011/3012 ....................... 59
Register Map for dsPIC30F2012/3013 ....................... 59
Register Map for dsPIC30F2011/2012/3012/3013 ..... 59
Register Map for dsPIC30F2011/3012 ....................... 59
Register Map for dsPIC30F2012/3013 ....................... 60
Register Map for dsPIC30F2012/3013 ....................... 60
Idle............................................................................ 128
Sleep ........................................................................ 127
Sleep and Idle........................................................... 117
Timing Characteristics .............................................. 163
Timing Requirements ............................................... 164
Construction ............................................................... 29
Data Access from Program Memory Using
Data Access From Program Memory Using
Data Access from, Address Generation ..................... 29
Data Space Window into Operation ........................... 32
Data Table Access (LS Word) .................................... 30
Data Table Access (MS Byte) .................................... 31
Memory Map............................................................... 28
Table Instructions
LP Oscillator Control......................................... 121
Phase Locked Loop (PLL) ................................ 121
Start-up Timer (OST)........................................ 120
Program Space Visibility..................................... 31
Table Instructions ............................................... 30
TBLRDH ............................................................. 30
TBLRDL.............................................................. 30
TBLWTH............................................................. 30
TBLWTL ............................................................. 30
PD
)................................................ 151
DS70139C-page 197