AT91RM3400-AI-001 ATMEL [ATMEL Corporation], AT91RM3400-AI-001 Datasheet - Page 82
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AT91RM3400-AI-001
Manufacturer Part Number
AT91RM3400-AI-001
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT91RM3400-AI-001.pdf
(461 pages)
- Current page: 82 of 461
- Download datasheet (6Mb)
Internal Memory Mapping
Internal Memory Area 0
Remap Command
82
AT91RM3400
Within the Internal Memory address space, the Address Decoder of the Memory Con-
troller decodes eight more address bits to allocate 1-Mbyte address spaces for the
embedded memories.
The allocated memories are accessed all along the 1-Mbyte address space and so are
repeated n times within this address space, n equaling 1M bytes divided by the size of
the memory.
When the address of the access is undefined within the internal memory area, the
Address Decoder returns an Abort to the master.
Figure 23. Internal Memory Mapping
The first 32 bytes of Internal Memory Area 0 contain the ARM processor exception vec-
tors, in particular, the Reset Vector at address 0x0.
Before execution of the remap command, the on-chip ROM is mapped into Internal
Memory Area 0, so that the ARM7TDMI reaches an executable instruction contained in
ROM. After the remap command, the internal SRAM at address 0x0020 0000 is mapped
into Internal Memory Area 0. The memory mapped into Internal Memory Area 0 is
accessible in both its original location and at address 0x0.
After execution, the Remap Command causes the Internal SRAM to be accessed
through the Internal Memory Area 0.
As the ARM vectors (Reset, Abort, Data Abort, Prefetch Abort, Undefined Instruction,
Interrupt, and Fast Interrupt) are mapped from address 0x0 to address 0x20, the Remap
Command allows the user to redefine dynamically these vectors under software control.
The Remap Command is accessible through the Memory Controller User Interface by
writing the MC_RCR (Remap Control Register) RCB field to one.
The Remap Command can be cancelled by writing the MC_RCR RCB field to one,
which acts as a toggling command. This allows easy debug of the user-defined boot
sequence by offering a simple way to put the chip in the same configuration as after a
reset.
256M Bytes
0x0000 0000
0x0010 0000
0x0020 0000
0x000F FFFF
0x001F FFFF
0x002F FFFF
0x0FFF FFFF
0x0030 0000
Internal Memory Area 0
Internal Memory Area 1
Internal Memory Area 2
Undefined Areas
Internal SRAM
Internal ROM
(Abort)
1M Bytes
1M Bytes
1M Bytes
253M bytes
1790A–ATARM–11/03
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