at91rm3400 ATMEL Corporation, at91rm3400 Datasheet

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at91rm3400

Manufacturer Part Number
at91rm3400
Description
Atmel Advanced At91 Arm Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
Features
Incorporates the ARM7TDMI™ ARM
96K Bytes of Internal High-speed SRAM
256K Bytes of Internal High-speed ROM Integrating Default Boot Program
Memory Controller (MC)
Clock Generator and Power Management Controller (PMC)
Advanced Interrupt Controller (AIC)
Two 32-bit Parallel Input/Output Controllers (PIO) PIOA and PIOB
System Timer (ST) Including a 16-bit Counter, Watchdog and Second Counter
Real Time Clock (RTC) with Alarm Interrupt
Debug Unit (DBGU), 2-wire USART and Support for Debug Communication Channel
Twenty Peripheral Data Controller (PDC) Channels
USB 2.0 Full-speed (12 Mbits per second) Device Port (UDP)
Multimedia Card Interface (MCI)
Three Synchronous Serial Controllers (SSC)
Four Universal Synchronous/Asynchronous Receiver Transmitters (USART)
Master/Slave Serial Peripheral Interface (SPI)
Two Three-channel 16-bit Timer/Counters (TC)
Two-wire Interface (TWI)
IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
Required Power Supplies:
Fully Static Operation: 0 Hz to 66 MHz @2.7V/1.8V, up to 60 MIPS
Available in a 100-lead LQFP Package
– Embedded ICE In-circuit Emulation, Debug Communication Channel Support
– Downloads Application from External Storage Medium in Internal SRAM
– Memory Protection Unit, Abort Status and Misalignment Detection
– 3 to 20 MHz and 32 kHz On-chip Oscillators with Two PLLs
– Programmable Software Power Optimization Capabilities
– Four Programmable External Clock Signals
– Thirty Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Seven External Interrupt Sources and One Fast Interrupt Source, Spurious
– Sixty-three Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain and Synchronous Output
– Programmable ICE Access Prevention
– On-chip Transceiver
– 2-Kbyte Configurable FIFO for Loading and Storing Messages
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC
– MMC and SDCard Compliant, Support for up to two SDCards
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
– Individual Baud Rate Generator
– Support for ISO7816 T0/T1 Smart Card, Hardware and Software Handshaking,
– Modem Control Lines on USART 1, IrDA Infrared Modulation/Demodulation
– 8- to 16-bit Programmable Data Length
– Four External Peripheral Chip Selects
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
– Master Mode Support, All Two-wire Atmel EEPROMs Supported
– 1.65V to 1.95V for VDDCORE, VDDOSC and VDDPLL
– 1.65V to 3.6V on VDDIO
Interrupt Protected
RS485 Support
®
Thumb
®
Processor
ARM7TDMI
based
Microcontroller
AT91RM3400
1790A–ATARM–11/03
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1

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