at91rm3400 ATMEL Corporation, at91rm3400 Datasheet - Page 407

• Manufacturer Part Number: at91rm3400
• Description: Atmel Advanced At91 Arm Microcontroller
• Manufacturer: ATMEL Corporation

Figure 170. Data OUT Transfer for Ping-pong Endpoint
Note:
1790A–ATARM–11/03
USB Bus
Packets
RX_DATA_BK0 Flag
(USB_CSRx)
RX_DATA_BK1 Flag
(USB_CSRx)
FIFO (DPR)
Bank 0
FIFO (DPR)
Bank 1
An interrupt is pending while the RX_DATA_BK0 or RX_DATA_BK1 flag is set.
Host Sends First Data Payload
Data OUT
PID
Set by USB Device,
Data Payload Written
in FIFO Endpoint Bank 0
Write by USB Device
Data OUT1
10. The microcontroller transfers out data received from the endpoint’s memory to the
11. The microcontroller notifies the USB device it has finished the transfer by clearing
12. A fourth Data OUT packet can be accepted by the USB device and copied in the FIFO
Warning: When RX_DATA_BK0 and RX_DATA_BK1 are both set, there is no way to deter-
mine which one to clear first. Thus the software must keep an internal counter to be sure to
clear alternatively RX_DATA_BK0 then RX_DATA_BK1. This situation may occur when the
software application is busy elsewhere and the two banks are filled by the USB host. Once the
application comes back to the USB driver, the two flags are set.
Data OUT 1
microcontroller’s memory. Data received is available by reading the endpoint’s
USB_FDRx register.
RX_DATA_BK1 in the endpoint’s USB_CSRx register.
Bank 0.
ACK
PID
Read By Microcontroller
Set by USB Device,
Data Payload Written
in FIFO Endpoint Bank 1
Interrupt Pending
Microcontroller Reads Data 1 in Bank 0,
Host Sends Second Data Payload
Data OUT 1
Data OUT
PID
Write by USB Device
Data OUT 2
Data OUT 2
Cleared by Firmware
ACK
PID
Read By Microcontroller
Data OUT
Microcontroller Reads Data2 in Bank 1,
Host Sends Third Data Payload
PID
Interrupt Pending
Data OUT 2
AT91RM3400
Write In Progress
Cleared by Firmware
Data OUT 3
Data OUT 3
A
P
407