at91rm3400 ATMEL Corporation, at91rm3400 Datasheet - Page 77

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at91rm3400

Manufacturer Part Number
at91rm3400
Description
Atmel Advanced At91 Arm Microcontroller
Manufacturer
ATMEL Corporation
Datasheet

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Reset Controller
Overview
NRST
Conditions
1790A–ATARM–11/03
The AT91RM3400 has one reset input line called NRST. This line provides:
The NRST signal is considered as the System Reset signal and the reader must take care
when designing the logic to drive this reset signal. It is an active low signal that asynchro-
nously resets the logic in the AT91RM34000.
NRST is the active low reset input. When power is first applied to the system, a power-on reset
(also called a “cold” reset) must be applied to the AT91RM3400. During this transient state, it
is mandatory to hold the reset signal low long enough for the power supply to reach a working
nominal level and for the oscillator to reach a stable operating frequency. Typically, these fea-
tures are provided by all power supply supervisors with electrical characteristics considered as
not nominal below a certain threshold voltage limit. Power-up is not the only event that must
be considered; power-down or a brownout are also occurrences to assert the NRST signal.
This threshold voltage must be selected according to the minimum operating voltage of the
AT91RM3400 power supply lines marked as VDD in Figure 19. (See “DC Characteristics” on
page 432.).
The choice of the reset holding delay depends on the start-up time of the low frequency oscil-
lator as shown in Figure 19 (See “32 kHz Oscillator Characteristics” on page 435.).
Figure 19. Cold Reset and Oscillator Start-up Relationship
Note:
NRST can also be asserted in circumstances other than the power-up sequence, such as a
manual command. In this case, assertion can be performed asynchronously, but exit from
reset is synchronized internally to the default active clock. During normal operation, NRST
must be active for a minimum delay time to ensure correct behavior (see Figure 20 and Table
24).
Table 24. Reset Minimum Pulse Width
Symbol
RST
VDD
XIN32
NRST
Initialization of the User Interface registers (defined in the user interface of each
peripheral) and sampling of the signals needed at bootup. It forces the processor to fetch
the next instruction at address zero.
Initialization of the embedded ICE TAP controller.
1
(1)
VDDmin
1. VDD is applicable to V
Parameter
NRST Minimum Pulse Width
Oscillator Stabilization
after Power-Up
DDIO
, V
DDPLL
, V
DDOSC
and V
DDCORE
Minimum Pulse Width
.
92
AT91RM3400
Unit
µs
77

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