at91rm3400 ATMEL Corporation, at91rm3400 Datasheet - Page 20

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at91rm3400

Manufacturer Part Number
at91rm3400
Description
Atmel Advanced At91 Arm Microcontroller
Manufacturer
ATMEL Corporation
Datasheet

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System Interrupt
External Interrupts
Product Memory Mapping
Internal Memory
Mapping
Internal RAM
Internal ROM
20
AT91RM3400
The system interrupt (Peripheral ID 1) is the wired-OR of the signal coming from:
The clock of these peripherals cannot be controlled and the Peripheral ID 1 can only be used
within the Advanced Interrupt Controller.
All external interrupt signals, i.e, the Fast Interrupt signal FIQ or the Interrupt signals IRQ0 to
IRQ6, use a dedicated Peripheral ID. However, there is no clock control associated with these
peripherals IDs.
The AT91RM3400 embeds a high-speed 96-Kbyte SRAM bank. After reset and until the
Remap Command is performed, the SRAM is only accessible at address 0x0020 0000. After
Remap, the SRAM also becomes available at address 0x0.
The AT91RM3400 features one bank of 256K bytes of ROM. At any time, the ROM is mapped
to address 0x0010 0000. It is also accessible at address 0x0 after the reset and before the
Remap Command.
Figure 3. Internal Memory Mapping
the Power Management Controller
the System Timer
the Real Time Clock
the Debug Unit
256M Bytes
0x0000 0000
0x0010 0000
0x0020 0000
0x0030 0000
0x000F FFFF
0x001F FFFF
0x002F FFFF
0x0FFF FFFF
ROM Before Remap
Undefined Areas
SRAM After Remap
Internal SRAM
Internal ROM
(Abort)
253 M Bytes
1 M Bytes
1 M Bytes
1 M Bytes
1790A–ATARM–11/03

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