at91rm3400 ATMEL Corporation, at91rm3400 Datasheet - Page 333
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at91rm3400
Manufacturer Part Number
at91rm3400
Description
Atmel Advanced At91 Arm Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT91RM3400.pdf
(461 pages)
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AT91RM3400
• STTDLY: Transmit Start Delay
If STTDLY is not 0, a delay of STTDLY clock cycles is inserted between the start event and the actual start of transmission
of data. When the Transmitter is programmed to start synchronously with the Receiver, the delay is also applied.
Please Note: STTDLY must be set carefully. If STTDLY is too short with respect to TAG (Transmit Sync Data) emission, data
is emitted instead of the end of TAG.
• PERIOD: Transmit Period Divider Selection
This field selects the divider to apply to the selected Transmit Clock to generate a new Frame Sync Signal. If 0, no period
signal is generated. If not 0, a period signal is generated at each 2 x (PERIOD+1) Transmit Clock.
333
1790A–ATARM–11/03
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