EP9301-EQ CIRRUS [Cirrus Logic], EP9301-EQ Datasheet
EP9301-EQ
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EP9301-EQ Summary of contents
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... This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. © Copyright 2005 Cirrus Logic (All Rights Reserved) EP9301 Data Sheet Entry-level ARM9 12 Direct Memory Access (DMA) Channels Real-time Clock with software Trim Dual PLL controls all clock domains. ...
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... Educational toys • Industrial computers • Industrial hand-held devices • Voting machines • Medical equipment The EP9301 is one of a series of ARM920T-based devices. Other members of the family have different peripheral sets, a coprocessor, and different package configurations. Revision Date 1 October 2003 Initial Release. ...
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... Ethernet MAC Interface ............................................................................................ 27 Audio Interface ........................................................................................................... 29 AC’97 ........................................................................................................................ 32 ADC ........................................................................................................................... 33 JTAG .......................................................................................................................... 34 208 Pin LQFP Package Outline .....................................................................35 208 Pin LQFP Pinout ................................................................................................. 36 Acronyms and Abbreviations ........................................................................40 Units of Measurement .....................................................................................40 ORDERING INFORMATION ............................................................................41 DS636PP5 © Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor EP9301 3 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor List of Figures Figure 1. Timing Diagram Drawing Key ................................................................................. 13 Figure 2. SDRAM Load Mode Register Cycle Timing Measurement ..................................... 14 Figure 3. SDRAM Burst Read Cycle Timing Measurement ................................................... 15 Figure 4. SDRAM Burst Write Cycle Timing Measurement ................................................... 16 Figure 5. SDRAM Auto Refresh Cycle Timing Measurement ................................................ 17 Figure 6 ...
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... Table N. Reset and Power Management Pin Assignments ................................................... 10 Table O. Hardware Debug Interface ...................................................................................... 10 Table P. Pin List in Numerical Order by Pin Number ............................................................. 36 Table Q. Pin Description ...................................................................................................... 38 Table R. Pin Multiplex Usage Information ............................................................................. 39 DS636PP5 © Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor EP9301 5 ...
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... EP9301 through the use of laser probing technology. These IDs can then be used to match secure copyrighted content with the ID of the target device the EP9301 is powering, and then deliver the copyrighted information over a secure connection. In addition, secure transactions can benefit by also matching device IDs to server IDs. MaverickKey IDs provide a level of hardware security required for today’ ...
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... Clock Clock AC'97 Serial AC'97 Serial Input I2S Serial Input Input AC'97 Serial AC'97 Serial Output I2S Serial Output Output Pin Description External Analog Measurement Input External Analog Measurement Input External Analog Measurement Input External Analog Measurement Input External Analog Measurement Input EP9301 AC'97 Mode 7 ...
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... General Two-wire Interface Clock Purpose I/O General Two-wire Interface Data Purpose I/O A real time clock must be connected to RTCXTALI or the EP9301device will not boot. Table I. Real-Time Clock with Pin Assignments Pin Name - Description Real-Time Clock Oscillator Input Real-Time Clock Oscillator Output Alternative Usage DS636PP5 ...
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... INT[2] is not bonded out. Table L. Dual LED Pin Assignments Pin Name - Alternative Usage Description Green LED General Purpose I/O Red LED General Purpose I/O Pin Name - Description Expanded General Purpose Input / Output Pins with Interrupts Expanded General Purpose Input / Output Pins with Interrupts EP9301 9 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor Reset and Power Management The chip may be reset through the PRSTn pin or through the open drain common reset pin, RSTOn. Clocks are managed on a peripheral-by-peripheral basis and may be turned off to conserve power. The processor clock is dynamically adjustable from 0 to 166 MHz ...
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... Max RVDD - 3.96 CVDD - 2.16 VDD_PLL - 2.16 VDD_ADC - 3. ±10 - ±50 -0.3 RVDD+0.3 -40 +125 Min Typ Max RVDD 3.0 3.3 3.6 CVDD 1.65 1.80 1.94 1.65 1.80 1.94 3.0 3.3 3 +25 + -40 +25 +85 A FCLK - - 166 FCLK - - 166 HCLK - - 66 HCLK - - 66 EP9301 Unit °C Unit °C °C MHz MHz MHz MHz 11 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor DC Characteristics ( 70° C; CVDD = VDD_PLL = 1.8; RVDD = 3 All grounds = 0 V; all voltages with respect unless otherwise noted) Parameter High level output voltage Iout = -4 mA Low level output voltage Iout = 4 mA High level input voltage ...
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... MHz and 100 MHz (92 MHz for industrial conditions). DS636PP5 Clock High to Low High/Low to High Bus Change Bus Valid Undefined/Invalid Valid Bus to Tristate Bus/Signal Omission Figure 1. Timing Diagram Drawing Key © Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor EP9301 13 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor Memory Interface Figure 2 through Figure 5 define the timings associated with all phases of the SDRAM. The following table contains the values for the timings of each of the SDRAM modes. Parameter SDCLK high time SDCLK low time ...
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... DS636PP5 t clk_low DAs DAh n t DAs Figure 3. SDRAM Burst Read Cycle Timing Measurement © Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor t clk_high t clkrf t DQh t DQh DAh EP9301 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor SDRAM Burst Write Cycle SDCLK t d SDCSn RASn CASn SDWEn DQMn clk_low Figure 4. SDRAM Burst Write Cycle Timing Measurement © Copyright 2005 Cirrus Logic (All Rights Reserved) t clk_high t clkrf ...
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... Chip select shown as bus to illustrate multiple devices being put into auto refresh in one access Figure 5. SDRAM Auto Refresh Cycle Timing Measurement DS636PP5 t clk_low © Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor t clk_high t clkrf EP9301 17 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor Static Memory 32-bit Read on 8-bit External Bus Parameter AD setup to CSn assert time CSn assert to Address transition time Address assert time AD transition to CSn deassert time AD hold from CSn deassert time RDn assert time CSn to RDn delay time ...
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... HCLK × 2 × HCLK HCLK - 1 × (WST1 + HCLK × HCLK - - - ADd ADh t CSh t WRpwL t WRpwH t DQMpwL t DQMpwH t t DAV DAV t t DAh EP9301 Unit DAh 19 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor Static Memory 32-bit Read on 16-bit External Bus Parameter AD setup to CSn assert time CSn assert to AD transition time AD transition to CSn deassert time AD hold from CSn deassert time RDn assert time CSn to RDn delay time CSn assert to DQMn assert delay time ...
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... Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor Typ Max - - - HCLK - - - - - 2 t × (WST1 + 1) - HCLK (t × HCLK - 1 t × (WST1 + 1) - HCLK (t × HCLK - - - 8 t ADh t CSh t WRpwL t DQpwL t DAV EP9301 Unit DAh 21 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor Static Memory Burst Read Cycle Parameter CSn assert to Address 1 transition time Address assert time AD transition to CSn deassert time AD hold from CSn deassert time CSn to RDn delay time CSn to DQMn assert delay time DA setup to AD transition time ...
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... Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor Typ Max + 6 t HCLK 2 1 × (WST1 + 1) t HCLK × HCLK × (WST1 + 11) t HCLK × HCLK 8 EP9301 Unit ADh t CSh 23 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor Static Memory Single Read Wait Cycle Parameter CSn assert to WAIT time WAIT assert time WAIT to CSn deassert delay time AD CSn WRn RDn DQMn DA WAIT Figure 12. Static Memory Single Read Wait Cycle Timing Measurement 24 Symbol ...
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... HCLK × CSnd HCLK t WAITd t WAITpw © Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor Typ Max × HCLK × (WST1- HCLK × 510 t - HCLK × HCLK t WRd t CSnd EP9301 Unit ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor Static Memory Turnaround Cycle Parameter CSnX deassert to CSnY assert time Notes and Y represent any two chip select numbers. 2. IDCY occurs on read-to-write and write-to-read. 3. IDCY is honored when going from a asynchronous device (CSx synchronous device (/SDCSy). ...
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... Max 10 Mbit 100 Mbit 10 Mbit 100 Mbit mode mode mode mode 400 200 20 260 26 200 20 260 400 200 20 260 26 200 20 260 400 400 - - - - - - - - - - - - 300 300 EP9301 Unit ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor TXCLK t TXd TXD[3:0]/ TXEN/ TXERR RXCLK RXD[3:0]/ RXDVAL/ RXERR MDC t MDC_high MDIO t (Sourced MDC_per by STA) MDC MDIO (Sourced by PHY TX_high TX_low t TX_per t RXh t RXs t MDC_low t MDIOd Figure 15. Ethernet MAC Timing Measurement © Copyright 2005 Cirrus Logic (All Rights Reserved) ...
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... Figure 17. Microwire Frame Format, Single Transfer © Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor Min Typ Max - tspix_clk - - (tspix_clk (tspix_clk LSB EP9301 Unit ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor Motorola SPI t clk_high SCLK (SPO=0) SCLK (SPO=1) t DMs SSPTXD MSB (master) t DMd t DSs SSPRXD MSB (slave) SFRM 30 t clk_per t clk_low t DMh t DSh Figure 18. SPI Format with SPH=1 Timing Measurement © Copyright 2005 Cirrus Logic (All Rights Reserved) ...
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... Figure 19. Inter-IC Sound (I S) Timing Measurement © Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor Min Typ Max i2s_clk ( i2s_clk ( i2s_clk clkrf t SDIh t SDOh EP9301 Unit ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor AC’97 Parameter ABITCLK input cycle time ABITCLK input high time ABITCLK input low time ABITCLK input rise/fall time ASDI setup to ABITCLK falling ASDI hold after ABITCLK falling ASDI input rise/fall time ABITCLK rising to ASDO / ASYNC valid, C ...
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... Figure 21. ADC Transfer Function © Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor Value Units 50K counts (approximate) 0.01% ±15 0.2% 3750 Samples per second 925 Samples per second 500 2 120 Vref EP9301 mV µs ms µV 33 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor JTAG Parameter TCK clock period TCK clock high time TCK clock low time TMS / TDI to clock rising setup time Clock rising to TMS / TDI hold time JTAG port clock to output JTAG port high impedance to valid output ...
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... Drawing above does not reflect exact package pin count. DS636PP5 29.60 (1.165) 30.40 (1.197) 27.80 (1.094) 28.20 (1.110) Pin 1 Indicator Pin 1 0.45 (0.018) 0.75 (0.030) © Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor 0.17 (0.007) 0.27 (0.011) 27.80 (1.094) 28.20 (1.110) 1.35 (0.053) 1.00 (0.039) BSC 1.45 (0.057) 0° MIN 7° MAX 0.05 (0.002) 0.15 (0.006) EP9301 35 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor 208 Pin LQFP Pinout The following table shows the 208 pin LQFP pinout. • VDD_core is CVDD. • VDD_ring is RVDD. • NC means that the pin is not connected. Pin List The following Low-Profile Quad Flat Pack (LQFP) pin assignment table is sorted in order of pin. ...
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... Table summary of the EP9301 pin signals, which illustrates the pad type and pad pull type (if any). The symbols used in the table are defined as follows. (Note: A blank box means Not Applicable (NA) or, for Pull Type, No Pull (NP) ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor . Table Q. Pin Description Pad Pull Pin Name Block Type Type TCK JTAG I PD JTAG clock in TDI JTAG I PD JTAG data in TDO JTAG 4ma JTAG data out TMS JTAG I PD JTAG test mode select TRSTn ...
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... Copyright 2005 Cirrus Logic (All Rights Reserved) Entry Level ARM9 System-on-Chip Processor Multiplex signal name RI CLK1HZ HDLCCLK1 SDO1 SDI1 SDO2 DREQ0 DACK0 DEOT0 DREQ1 DACK1 DEOT1 SDI2 PWMOUT1 DASP SCLK LRCK SDO0 SDI0 MCLK SCLK LRCK SDO0 SDI0 EP9301 39 ...
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... EP9301 Entry Level ARM9 System-on-Chip Processor Acronyms and Abbreviations The following tables list abbreviations and acronyms used in this data sheet. Term Definition ADC Analog-to-Digital Converter ALT Alternative AMBA Advanced Micro-controller Bus Architecture ATAPI ATA Packet Interface CODEC COder / DECoder ...
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... The order numbers for the device are: EP9301-CQ EP9301-CQZ -40 ° +85 ° C EP9301-IQ -40 ° +85 ° C EP9301-IQZ EP9301 — CQZ Part Number Product Line: Embedded Processor Note the Cirrus Logic Internet site at http://www.cirrus.com to find contact information for your local sales representative. Contacting Cirrus Logic Support For all product questions and inquiries contact a Cirrus Logic Sales Representative ...