ZLF645 MAXIM [Maxim Integrated Products], ZLF645 Datasheet - Page 62

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ZLF645

Manufacturer Part Number
ZLF645
Description
Flash MCUs with Learning Amplification
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet

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Enabling Flash Accesses Through the ICP
ICP Interface Logic Architecture
ICP Interface Operation
19-4572; Rev 0; 4/09
System Clock
ICP Pin
After the ZLF645 is in ICP mode, the
programmed to 1 before Flash accesses are enabled through the ICP interface.
The ICP logic within the ZLF645 MCU consists of four primary functional blocks: trans-
mitter, receiver, auto-baud detector/generator, and Flash Controller interface.
displays the architecture of the ICP.
After the ZLF645 MCU is in ICP mode, pin P34 acts a bidirectional open-drain interface
with internal pull-ups used for transmitting and receiving the data. Data transmission is
half-duplex, in that transmit and receive cannot occur simultaneously. Serial data on P34 is
sent using the standard asynchronous data format defined in RS-232. This pin creates an
interface from the ZLF645 MCU to the serial port of a host PC using minimal external
hardware.
RS-232 connection using an open-drain buffer. The ICP pin must always be connected to
V
DD
through an external pull-up resistor.
Figure 17
Figure 16. In-Circuit Programmer Block Diagram
Detector/Generator
Auto-Baud
displays the recommended method of connecting P34 pin to an 
Transmitter
Receiver
FLASHCTL
bit of the ICP Control register must be
Enabling Flash Accesses Through the ICP
ZLF645 Series Flash MCUs
Product Specification
Flash Controller
Interface
Figure 16
54

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