ST7FL15F1MAE STMICROELECTRONICS [STMicroelectronics], ST7FL15F1MAE Datasheet - Page 89
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ST7FL15F1MAE
Manufacturer Part Number
ST7FL15F1MAE
Description
8-bit MCU for automotive with single voltage Flash/ROM memory, data EEPROM, ADC, 5 timers, SPI
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST7FL15F1MAE.pdf
(138 pages)
- Current page: 89 of 138
- Download datasheet (3Mb)
10-BIT A/D CONVERTER (ADC) (cont’d)
11.5.3.2 Digital A/D Conversion Result
The conversion is monotonic, meaning that the re-
sult never decreases if the analog input does not
and never increases if the analog input does not.
If the input voltage (V
(high-level voltage reference) then the conversion
result is FFh in the ADCDRH register and 03h in
the ADCDRL register (without overflow indication).
If the input voltage (V
level voltage reference) then the conversion result
in the ADCDRH and ADCDRL registers is 00 00h.
The A/D converter is linear and the digital result of
the conversion is stored in the ADCDRH and AD-
CDRL registers. The accuracy of the conversion is
described in the Electrical Characteristics Section.
R
for an analog input signal. If the impedance is too
high, this results in a loss of accuracy due to leak-
age and sampling not being completed in the allot-
ed time.
11.5.3.3 A/D Conversion
The analog input ports must be configured as in-
put, no pull-up, no interrupt. Refer to the “I/O ports”
chapter. Using these pins as analog inputs does
not affect the ability of the port to be read as a logic
input.
In the ADCCSR register:
ADC Conversion mode
In the ADCCSR register:
Set the ADON bit to enable the A/D converter and
to start the conversion. From this time on, the ADC
AIN
– Select the CH[2:0] bits to assign the analog
channel to convert.
is the maximum recommended impedance
AIN
AIN
) is lower than V
) is greater than V
SSA
(low-
DDA
performs a continuous conversion of the selected
channel.
When a conversion is complete:
A read to the ADCDRH resets the EOC bit.
To read the 10 bits, perform the following steps:
1. Poll the EOC bit
2. Read ADCDRL
3. Read ADCDRH. This clears EOC automati-
To read only 8 bits, perform the following steps:
1. Poll EOC bit
2. Read ADCDRH. This clears EOC automati-
11.5.4 Low-Power Modes
Note: The A/D converter may be disabled by re-
setting the ADON bit. This feature allows reduced
power consumption when no conversion is need-
ed and between single shot conversions.
11.5.5 Interrupts
None.
– The EOC bit is set by hardware.
– The result is in the ADCDR registers.
cally.
cally.
Mode
WAIT
HALT
No effect on A/D converter
A/D Converter disabled.
After wake-up from HALT mode, the A/D
converter requires a stabilization time t
(see Electrical Characteristics) before accu-
rate conversions can be performed.
Description
ST7L15, ST7L19
89/138
STAB
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