ST7FLITE29 STMICROELECTRONICS [STMicroelectronics], ST7FLITE29 Datasheet - Page 45

• Manufacturer Part Number: ST7FLITE29
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

POWER SAVING MODES (Cont’d)
9.6.0.1 Register Description
AWUFH CONTROL/STATUS REGISTER
(AWUCSR)
Read /Write
Reset Value: 0000 0000 (00h)
Bits 7:3 = Reserved.
Bit 1= AWUF Auto Wake Up Flag
This bit is set by hardware when the AWU module
generates an interrupt and cleared by software on
reading AWUCSR. Writing to this bit does not
change its value.
0: No AWU interrupt occurred
1: AWU interrupt occurred
Bit 1= AWUM Auto Wake Up Measurement
This bit enables the AWU RC oscillator and con-
nects its output to the inputcapture of the 12-bit
Auto-Reload timer. This allows the timer to be
used to measure the AWU RC oscillator disper-
sion and then compensate this dispersion by pro-
viding the right value in the AWUPRE register.
0: Measurement disabled
1: Measurement enabled
Bit 0 = AWUEN Auto Wake Up From Halt Enabled
This bit enables the Auto Wake Up From Halt fea-
ture: once HALT mode is entered, the AWUFH
wakes up the microcontroller after a time delay de-
pendent on the AWU prescaler value. It is set and
cleared by software.
0: AWUFH (Auto Wake Up From Halt) mode disa-
1: AWUFH (Auto Wake Up From Halt) mode ena-
AWUFH PRESCALER REGISTER (AWUPR)
Read /Write
Table 7. AWU Register Map and Reset Values
Address
bled
bled
7
0
004Ah
(Hex.)
0049h
0
AWUPR
Reset Value
AWUCSR
Reset Value
Register
0
Label
0
AWUPR7
0
7
1
0
AWU
F
AWUPR6
AWU
6
1
0
M
AWU
AWUPR5
EN
0
5
1
0
Bits 7:0= AWUPR[7:0] Auto Wake Up Prescaler
These 8 bits define the AWUPR Dividing factor (as
explained below:
In AWU mode, the period that the MCU stays in
Halt Mode (t
fined by
This prescaler register can be programmed to
modify the time that the MCU stays in Halt mode
before waking up automatically.
Note: If 00h is written to AWUPR, depending on
the product, an interrupt is generated immediately
after a HALT instruction, or the AWUPR remains
inchanged.
AWU
AWUPR4
PR7
7
AWUPR[7:0
4
1
0
t
AWU
FEh
FFh
00h
01h
AWU
PR6
...
AWUPR3
=
AWU
AWU
PR5
]
64
3
1
0
AWUPR
in
AWU
PR4
Figure 29 on page
AWUPR2
AWUF
2
1
AWU
PR3
------------------------- -
f
Dividing factor
AWURC
Forbidden
1
AWUPR1
AWU
254
255
AWUM
PR2
...
1
+
1
1
t
RCSTRT
AWU
ST7LITE2
PR1
43) is de-
AWUPR0
AWUEN
45/131
AWU
0
1
PR0
0
1