MC9S08AW60 FREESCALE [Freescale Semiconductor, Inc], MC9S08AW60 Datasheet - Page 106

• Manufacturer Part Number: MC9S08AW60
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Chapter 6 Parallel Input/Output
6.7.13
Port G parallel I/O function is controlled by the registers listed below.
106
PTGDD[6:0]
PTGD[6:0]
Reset
Reset
Field
Field
6:0
6:0
W
W
R
R
Port G I/O Registers (PTGD and PTGDD)
Port G Data Register Bits — For port G pins that are inputs, reads return the logic level on the pin. For port G
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port G pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTGD to all 0s, but these 0s are not driven out the corresponding pins because reset also
configures all port pins as high-impedance inputs with pullups disabled.
Data Direction for Port G Bits — These read/write bits control the direction of port G pins and what is read for
PTGD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port G bit n and PTGD reads return the contents of PTGDn.
0
0
7
7
PTGDD6
PTGD6
0
0
6
6
Table 6-33. PTGDD Register Field Descriptions
Figure 6-40. Data Direction for Port G (PTGDD)
Table 6-32. PTGD Register Field Descriptions
Figure 6-39. Port G Data Register (PTGD)
PTGDD5
PTGD5
0
0
5
5
MC9S08AW60 Data Sheet, Rev 2
PTGDD4
PTGD4
0
0
4
4
Description
Description
PTGDD3
PTGD3
3
0
3
0
PTGDD2
PTGD2
0
0
2
2
PTGDD1
Freescale Semiconductor
PTGD1
0
0
1
1
PTGDD0
PTGD0
0
0
0
0