MC908QL4 FREESCALE [Freescale Semiconductor, Inc], MC908QL4 Datasheet - Page 125

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MC908QL4

Manufacturer Part Number
MC908QL4
Description
M68HC08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Interrupts are latched, and arbitration is performed in the SIM at the start of interrupt processing. The
arbitration result is a constant that the CPU uses to determine which vector to fetch. Once an interrupt is
latched by the SIM, no other interrupt can take precedence, regardless of priority, until the latched
interrupt is serviced (or the I bit is cleared).
At the beginning of an interrupt, the CPU saves the CPU register contents on the stack and sets the
interrupt mask (I bit) to prevent additional interrupts. At the end of an interrupt, the RTI instruction recovers
the CPU register contents from the stack so that normal processing can resume.
interrupt entry timing.
Freescale Semiconductor
ADDRESS BUS
ADDRESS BUS
INTERRUPT
INTERRUPT
DATA BUS
DATA BUS
MODULE
MODULE
I BIT
I BIT
R/W
R/W
DUMMY
Figure 13-9
DUMMY
SP – 4
SP
PC – 1[7:0] PC – 1[15:8]
CCR
shows interrupt recovery timing.
Figure 13-9. Interrupt Recovery
MC68HC908QL4 Data Sheet, Rev. 7
SP – 1
Figure 13-8
SP – 3
A
SP – 2
SP – 2
.
X
Interrupt Entry
X
SP – 3
SP – 1
PC – 1[7:0] PC – 1[15:8] OPCODE
A
SP – 4
SP
CCR
VECT H
PC
V DATA H
VECT L
PC + 1
V DATA L
OPERAND
Figure 13-8
START ADDR
Exception Control
OPCODE
shows
125

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