S9S08AW16A FREESCALE [Freescale Semiconductor, Inc], S9S08AW16A Datasheet - Page 103
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S9S08AW16A
Manufacturer Part Number
S9S08AW16A
Description
HCS08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.S9S08AW16A.pdf
(330 pages)
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6.7.12
In addition to the I/O control, port F pins are controlled by the registers listed below.
Freescale Semiconductor
Bits 7, 3 and 2 are reserved bits that must always be written to 0.
Bits 7, 3 and 2 are reserved bits that must always be written to 0.
PTFPEn
PTFSEn
Reset
Reset
6:4, 1:0
6:4, 1:0
Field
Field
W
W
R
R
Port F Pin Control Registers (PTFPE, PTFSE, PTFDS)
Internal Pullup Enable for Port F Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTF pin. For port F pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port F bit n.
1 Internal pullup device enabled for port F bit n.
Output Slew Rate Control Enable for Port F Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTF pin. For port F pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port F bit n.
1 Output slew rate control enabled for port F bit n.
R
R
0
0
7
7
Figure 6-38. Output Slew Rate Control Enable for Port F (PTFSE)
PTFPE6
PTFSE6
0
Figure 6-37. Internal Pullup Enable for Port F (PTFPE)
0
6
6
Table 6-28. PTFPE Register Field Descriptions
Table 6-29. PTFSE Register Field Descriptions
PTFPE5
PTFSE5
MC9S08AC16 Series Data Sheet, Rev. 8
0
0
5
5
PTFPE4
PTFSE4
0
0
4
4
Description
Description
R
R
3
0
3
0
R
R
0
0
2
2
1
Chapter 6 Parallel Input/Output
PTFPE1
PTFSE1
1
0
0
1
1
PTFPE0
PTFSE0
0
0
0
0
103
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