S9S08AW16A FREESCALE [Freescale Semiconductor, Inc], S9S08AW16A Datasheet - Page 34

• Manufacturer Part Number: S9S08AW16A
• Description: HCS08 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Chapter 2 Pins and Connections
2.3.7
The remaining pins are shared among general-purpose I/O and on-chip peripheral functions such as timers
and serial I/O systems. Immediately after reset, all of these pins are configured as high-impedance
general-purpose inputs with internal pullup devices disabled.
For information about controlling these pins as general-purpose I/O pins, see
Input/Output.” For information about how and when on-chip peripheral systems use these pins, refer to the
appropriate chapter from
When an on-chip peripheral system is controlling a pin, data direction control bits still determine what is
read from port data registers even though the peripheral module controls the pin direction by controlling
the enable for the pin’s output buffer. See the
Pullup enable bits for each input pin control whether on-chip pullup devices are enabled whenever the pin
is acting as an input even if it is being controlled by an on-chip peripheral module. When the PTD3, PTD2,
and PTG4 pins are controlled by the KBI module and are configured for rising-edge/high-level sensitivity,
the pullup enable control bits enable pulldown devices rather than pullup devices. Similarly, when IRQ is
configured as the IRQ input and is set to detect rising edges, the pullup enable control bit enables a
pulldown device rather than a pullup device.
34
General-Purpose I/O and Peripheral Ports
To avoid extra current drain from floating input pins, the reset initialization
routine in the application program should either enable on-chip pullup
devices or change the direction of unused pins to outputs so the pins do not
float.
When an alternative function is first enabled it is possible to get a spurious
edge to the module, user software should clear out any associated flags
before interrupts are enabled.
modules are enabled. The highest priority module will have control over the
pin. Selecting a higher priority pin function with a lower priority function
already enabled can cause spurious edges to the lower priority module. It is
recommended that all modules that share a pin be disabled before enabling
another module.
Table
2-2.
MC9S08AC16 Series Data Sheet, Rev. 8
Table 2-1
Chapter 6, “Parallel
NOTE
NOTE
illustrates the priority if multiple
Input/Output” chapter for more details.
Chapter 6, “Parallel
Freescale Semiconductor