STM1404ARMBQ6F STMICROELECTRONICS [STMicroelectronics], STM1404ARMBQ6F Datasheet - Page 14
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STM1404ARMBQ6F
Manufacturer Part Number
STM1404ARMBQ6F
Description
3 V FIPS-140 security supervisor with battery switchover
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.STM1404ARMBQ6F.pdf
(35 pages)
Operation
3
3.1
3.2
3.3
Note:
Note:
14/36
Operation
Reset input
The STM1404 security supervisor asserts a reset signal to the MCU whenever V
below the reset threshold (V
RST is guaranteed to be a logic low for 0 V < V
a backup battery, RST is guaranteed valid down to V
During power-up, once V
the reset time-out period, t
If V
low for at least the reset time-out period (t
the internal timer clears. The reset timer starts when V
Push-button reset input
A logic low on MR asserts reset. Reset remains asserted while MR is low, and for t
Figure 25 on page
resistor, allowing it to be left open if not used. This input can be driven with TTL/CMOS-logic
levels or with open-drain/collector outputs. Connect a normally open momentary switch from
MR to ground to create a manual reset function; external debounce circuitry is not required.
If MR is driven from long cables or the device is used in a noisy environment, connect a
0.1µF capacitor from MR to V
tied to V
Backup battery switchover
In the event of a power failure, it may be necessary to preserve the contents of external
SRAM through V
automatically switch the SRAM to the backup supply when V
If backup battery is not used, connect both V
This family of security supervisors does not always connect V
greater than V
(~2.4 V) or V
battery) to have a higher voltage than V
Assuming that V
before V
external SRAMs. When V
point. V
The backup battery may be removed while V
decoupled (0.1 µF typ), without danger of triggering a reset.
CC
drops below the reset threshold, RST goes low. Each time RST is asserted, it stays
OUT
CC
OUT
when not used.
is connected to V
BAT
gets too close to the 2.0 V minimum required to reliably retain data in most
CC
BAT
(whichever is lower). This is done to allow the backup battery (e.g., a 3.6 V
OUT
. V
24) after it returns high. The MR input has an internal 40 kΩ pull-up
BAT
> 2.0 V, switchover at V
. With a backup battery installed with voltage V
connects to V
CC
CC
rec
exceeds the reset threshold an internal timer keeps RST low for
RST
recovers, hysteresis is used to avoid oscillation around the V
. After this interval RST returns high.
CC
SS
), or when the push-button reset input (MR) is taken low.
to provide additional noise immunity. MR may float, or be
through a 3 Ω PMOS power switch.
OUT
CC
rec
(through a 100Ω switch) when V
.
SO
). Any time V
BAT
CC
CC
ensures that battery backup mode is entered
is valid, assuming V
and V
< V
CC
RST
CC
OUT
=1V.
CC
if V
returns above the reset threshold.
to V
goes below the reset threshold
BAT
CC
BAT
CC
falls.
is greater than 1 V. Without
to V
.
BAT
BAT
OUT
, the devices
is adequately
when V
CC
is below V
CC
BAT
STM1404
rec
goes
is
(see
SW
SO