X4163 INTERSIL [Intersil Corporation], X4163 Datasheet - Page 10
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X4163
Manufacturer Part Number
X4163
Description
CPU Supervisor with 16K EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
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Figure 10. Writing 12-bytes to a 64-byte page starting at location 60.
The master terminates the Data Byte loading by issuing
a stop condition, which causes the device to begin the
nonvolatile write cycle. As with the byte write operation,
all inputs are disabled until completion of the internal
write cycle. See Figure 9 for the address, acknowledge,
and data transfer sequence.
Stops and Write Modes
Stop conditions that terminate write operations must
be sent by the master after sending at least 1 full data
byte plus the subsequent ACK signal. If a stop is
issued in the middle of a data byte, or before 1 full
data byte plus its associated ACK is sent, then the
device will reset itself without performing the write. The
contents of the array will not be effected.
Acknowledge Polling
can be used to take advantage of the typical 5ms write
cycle time. Once the stop condition is issued to indi-
cate the end of the master’s byte load operation, the
device initiates the internal nonvolatile cycle. Acknowl-
edge polling can be initiated immediately. To do this,
the master issues a start condition followed by the
Slave Address Byte for a write or read operation. If the
device is still busy with the nonvolatile cycle then no
ACK will be returned. If the device has completed the
write operation, an ACK will be returned and the host
can then proceed with the read or write operation.
Refer to the flow chart in Figure 11.
The disabling of the inputs during nonvolatile cycles
8 Bytes
Address
10
= 7
Address Pointer
Ends Here
Addr = 8
X4163, X4165
Address
Figure 11. Acknowledge Polling Sequence
60
Command Sequence
command sequence?
Issue Slave Address
Byte (Read or Write)
Byte load completed
complete. Continue
Enter ACK Polling
Continue Normal
by issuing STOP.
Nonvolatile Cycle
Read or Write
Issue START
PROCEED
returned?
4 Bytes
ACK
YES
YES
Address
n-1
NO
NO
Issue STOP
Issue STOP
April 13, 2005
FN8120.0