X4283 INTERSIL [Intersil Corporation], X4283 Datasheet - Page 5

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X4283

Manufacturer Part Number
X4283
Description
CPU Supervisor with 128K EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
Datasheets

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Figure 4. V
Control Register
The Control Register provides the user a mechanism
for changing the Block Lock and Watchdog Timer set-
tings. The Block Lock and Watchdog Timer bits are
nonvolatile and do not change when power is
removed.
The Control Register is accessed at address FFFFh. It
can only be modified by performing a byte write opera-
tion directly to the address of the register and only one
data byte is allowed for each register write operation.
TRIP
Emax = Maximum Allowed V
Programming Sequence
Old V
New V
CC
CC
Applied + Error
Applied =
5
Error ≤ –Emax
TRIP
Error
NO
Set V
X4283, X4285
V
(V
TRIP
Apply 5V to V
Measured V
Decrement V
CC
CC
Desired V
goes active?
Desired V
Reset V
RESET pin
Sequence
Sequence
Set V
= V
Execute
Execute
= V
Programming
DONE
CC
CC
TRIP
YES
–Emax < Error < Emax
TRIP
- 50mV)
Applied =
TRIP
TRIP
TRIP
Prior to writing to the Control Register, the WEL and
RWEL bits must be set using a two step process, with
the whole sequence requiring 3 steps. See "Writing to
the Control Register" below.
The user must issue a stop after sending this byte to
the register to initiate the nonvolatile cycle that stores
WD1, WD0, BP2, BP1, and BP0. The X4283/85 will
not acknowledge any data bytes written after the first
byte is entered.
CC
CC
-
Error ≥ Emax
Old V
New V
CC
Reset V
Sequence
CC
Execute
Applied - Error
Applied =
TRIP
March 29, 2005
FN8121.0

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