WM8985_07 WOLFSON [Wolfson Microelectronics plc], WM8985_07 Datasheet - Page 94

• Manufacturer Part Number: WM8985_07
• Description: Multimedia CODEC With Class D Headphone and Line Out
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

WM8985
w
7 (07h)
8 (08h)
REGISTER
ADDRESS
4:2
1
0
8
7:4
3:1
0
8
7
6
BIT
BCLKDIV
MS
M128ENB
DCLKDIV
SR
SLOWCLKEN
GPIO1GP
GPIO1GPU
GPIO1GPD
LABEL
000
0
0
0
1000
000
0
0
0
0
DEFAULT
Configures the BCLK output frequency, for use
when the chip is master over BCLK.
000=divide by 1 (BCLK=MCLK)
001=divide by 2 (BCLK=MCLK/2)
010=divide by 4
011=divide by 8
100=divide by 16
101=divide by 32
110=reserved
111=reserved
Reserved. Initialise to 0
Sets the chip to be master over LRC and BCLK
0=BCLK and LRC clock are inputs
1=BCLK and LRC clock are outputs generated
by the WM8985 (MASTER)
0 = low power mode enabled
1 = low power mode disabled
Controls clock division from SYSCLK to
generate suitable class D clock.
Recommended class D clock frequency =
1.4MHz.
0000 = divide by 1
0010 = divide by 2
0011 = divide by 3
0100 = divide by 4
0101 = divide by 5.5
0110 = divide by 6
1000 = divide by 8
1001 = divide by 12
1010 = divide by 16
Approximate sample rate (configures the
coefficients for the internal digital filters):
000=48kHz
001=32kHz
010=24kHz
011=16kHz
100=12kHz
101=8kHz
110-111=reserved
Slow clock enable. Used for both the jack insert
detect debounce circuit and the zero cross
timeout.
0 = slow clock disabled
1 = slow clock enabled
GPIO1 Open drain enable
0 = Open drain disabled
1 = Open drain enabled
GPIO1 Internal pull-up enable:
0 = Internal pull-up disabled
1 = Internal pull-up enabled
GPIO1 Internal pull-down enable:
0 = Internal pull-down disabled
1 = Internal pull-down enabled
DESCRIPTION
PP, Rev 3.5, March 2007
Digital Audio
Interfaces
Digital Audio
Interfaces
Additional
Control
Class A / D
Headphone
Outputs
Audio Sample
Rates
Analogue
Outputs
General
Purpose
Input/Output
(GPIO)
General
Purpose
Input/Output
(GPIO)
General
Purpose
Input/Output
(GPIO)
Pre-Production
REFER TO
94