ISPLSI2096VE-135LT128I LATTICE [Lattice Semiconductor], ISPLSI2096VE-135LT128I Datasheet
ISPLSI2096VE-135LT128I
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ISPLSI2096VE-135LT128I Summary of contents
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Features • SuperFAST HIGH DENSITY PROGRAMMABLE LOGIC — 4000 PLD Gates — 96 I/O Pins, Six Dedicated Inputs — 96 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small ...
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Functional Block Diagram Figure 1. ispLSI 2096VE Functional Block Diagram I I/O 1 I/O 2 I/O 3 I I/O 6 I/O 7 I I/O 10 I/O 11 I/O 12 I/O ...
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Absolute Maximum Ratings Supply Voltage V .................................. -0.5 to +5.4V cc Input Voltage Applied ............................... -0.5 to +5.6V Off-State Output Voltage Applied ............ -0.5 to +5.6V Storage Temperature ................................ -65 to 150 C Case Temp. with Power Applied .............. -55 ...
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Switching Test Conditions Input Pulse Levels Input Rise and Fall Time Input Timing Reference Levels Output Timing Reference Levels Output Load 3-state levels are measured 0.5V from steady-state active level. Output Load Conditions (see Figure 2) TEST CONDITION A Active ...
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External Timing Parameters 3 TEST PARAMETER # COND. t pd1 A 1 Data Propagation Delay, 4PT Bypass, ORP Bypass Data Propagation Delay pd2 Clock Frequency with Internal Feedback max f — 4 Clock Frequency ...
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External Timing Parameters 3 TEST PARAMETER # COND. t pd1 A 1 Data Propagation Delay, 4PT Bypass, ORP Bypass Data Propagation Delay pd2 Clock Frequency with Internal Feedback max f — 4 Clock Frequency ...
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Internal Timing Parameters 2 PARAMETER # Inputs t 20 Input Buffer Delay io t din 21 Dedicated Input Delay GRP t 22 GRP Delay grp GLB Product Term Bypass Path Delay (Combinatorial) 4ptbpc Product ...
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Timing Model I/O Cell Ded. In #21 I/O Delay I/O Pin #20 (Input) #45 Reset #43, 44 Y0,1,2 GOE Derivations of su, h and co from the Product Term Clock Logic ...
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Power Consumption Power consumption in the ispLSI 2096VE device de- pends on two primary factors: the speed at which the device is operating and the number of Product Terms Figure 3. Typical Device Power Consumption vs fmax I CC can ...
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Pin Description NAME TQFP PIN NUMBERS I I/O 5 21, 22, 23, I I/O 11 27, 28, 29, I I/O 17 35, 36, 37, I I/O 23 41, 42, 43, I/O 24 ...
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Pin Configuration ispLSI 2096VE 128-Pin TQFP Pinout Diagram 1 I/O 85 VCC I ...
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Part Number Description ispLSI 2096VE Device Family Device Number Speed f 250 = 250 MHz max* f 200 = 200 MHz max f 135 = 135 MHz max f 100 = 100 MHz max *Advanced information ispLSI 2096VE Ordering Information ...