GAL16V8 LATTICE [Lattice Semiconductor], GAL16V8 Datasheet
GAL16V8
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GAL16V8 Summary of contents
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... High Speed Graphics Processing — Standard Logic Speed Upgrade • ELECTRONIC SIGNATURE FOR IDENTIFICATION Description The GAL16V8, at 3.5 ns maximum propagation delay time, com- bines a high performance CMOS process with Electrically Eras- able ( floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (< ...
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... GAL16V8 Ordering Information Commercial Grade Specifications ...
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... The following is a list of the PAL architectures that the GAL16V8 can emulate. It also shows the OLMC mode under which the GAL16V8 emulates the PAL architecture. ...
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... XOR OE XOR Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically. Specifications GAL16V8 Dedicated input or output functions can be implemented as sub- sets of the I/O function. Registered outputs have eight product terms per output. I/O's have seven product terms per output. ...
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... DIP & PLCC Package Pinouts 2128 28 PTD 2191 5 Specifications GAL16V8 OLMC 19 XOR-2048 AC1-2120 OLMC 18 XOR-2049 AC1-2121 OLMC 17 XOR-2050 AC1-2122 OLMC 16 XOR-2051 AC1-2123 OLMC 15 XOR-2052 AC1-2124 OLMC 14 XOR-2053 AC1-2125 OLMC 13 ...
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... XOR XOR Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically. Specifications GAL16V8 bility. Designs requiring eight I/O's can be implemented in the Registered mode. All macrocells have seven product terms per output. One product term is used for programmable output enable control ...
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... DIP & PLCC Package Pinouts 2128 PTD 2191 7 Specifications GAL16V8 OLMC 19 XOR-2048 AC1-2120 OLMC 18 XOR-2049 AC1-2121 OLMC 17 XOR-2050 AC1-2122 OLMC 16 XOR-2051 AC1-2123 OLMC 15 XOR-2052 AC1-2124 OLMC 14 XOR-2053 AC1-2125 OLMC ...
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... AC1=0 defines this configuration. - Pins 15 & 16 are permanently configured to this function. Dedicated Input Configuration for Simple Mode - SYN=1. - AC0=0. - XOR=0 defines Active Low Output. - XOR=1 defines Active High Output. - AC1=1 defines this configuration. - All OLMC except pins 15 & 16 can be configured to this function. 8 Specifications GAL16V8 ...
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... DIP & PLCC Package Pinouts 2128 PTD 2191 9 Specifications GAL16V8 OLMC 19 XOR-2048 AC1-2120 OLMC 18 XOR-2049 AC1-2121 OLMC 17 XOR-2050 AC1-2122 OLMC 16 XOR-2051 AC1-2123 OLMC 15 XOR-2052 AC1-2124 OLMC 14 XOR-2053 AC1-2125 OLMC ...
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... IL L-3/-5 & -7 (Ind. PLCC) L-7 (Except Ind. PLCC)/-10/-15/-25 Q-10/-15/-20/- 0. OUT = 0. 3. 15MHz Outputs Open = 0. 3. 15MHz Outputs Open = Specifications GAL16V8D ) ............................... ........................... – MIN. TYP. — Vss – 0.5 2.0 — — — — — — — ...
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... Refer to fmax Descriptions section. Characterized but not 100% tested. 4) Characterized but not 100% tested. Capacitance ( 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL16V8D Over Recommended Operating Conditions MAXIMUM* UNITS COM COM / IND COM - MIN. MAX. ...
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... MAX — 7.5 — 0 — 66.7 — 71.4 — 83.3 — 6 — 6 — MAXIMUM* UNITS Specifications GAL16V8 COM / IND IND COM / IND -15 -20 -25 MIN. MAX. MIN. MAX. MIN. MAX — 8 — 9 — ...
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... Clock Width INPUT or I/O FEEDBACK CLK VALID INPUT REGISTERED t pd OUTPUT REGISTERED OUTPUT t wl CLK REGISTERED FEEDBACK 13 Specifications GAL16V8 VALID INPUT max (external fdbk) Registered Output t t dis Output Enable/Disable f 1/ max (internal fdbk) ...
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... Input Rise and Fall Times GAL16V8D-3/-5/-7 Input Timing Reference Levels Output Timing Reference Levels Output Load 3-state levels are measured 0.5V from steady-state active level. GAL16V8D (except -3) Output Load Conditions (see figure above) Test Condition 200 B Active High Active Low ...
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... NOTE: The electronic signature is included in checksum calcula- tions. Changing the electronic signature will alter the checksum. Security Cell A security cell is provided in the GAL16V8 devices to prevent un- authorized copying of the array patterns. Once programmed, this cell prevents further read access to the functional bits in the device. ...
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... INTERNAL REGISTER Q - OUTPUT FEEDBACK/EXTERNAL OUTPUT REGISTER Circuitry within the GAL16V8 provides a reset signal to all reg- isters during power-up. All internal registers will have their Q t outputs set low after a specified time ( the state on the registered output pins (if they are enabled) will always be high on power-up, regardless of the programmed polarity of the output pins ...
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... GAL16V8D-3/-5/-7 (IND PLCC): Typical AC and DC Characteristic Diagrams N ormalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 1.2 PT H->L PT L->H 1.1 1 0.9 0.8 0.7 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0.1 -0.2 -0.3 -0 Number of Outputs Switching Delta Tpd vs Output Loading RISE 1 0 FALL ...
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... GAL16V8D-3/-5/-7 (IND PLCC): Typical AC and DC Characteristic Diagrams Vol vs Iol 1 0.75 0.5 0. Iol (mA) Normalized Icc vs Vcc 1.2 1.1 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Delta Icc vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 Vin (V) Voh vs Ioh Ioh (mA) Normalized Icc vs Temp 1 ...
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... GAL16V8D-7 (Except IND PLCC)/-10L: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.15 1.1 RISE FALL 1.05 1 0.95 0.9 4.5 4.75 5 5.25 5.5 Supply Voltage (V) Normalized Tpd vs Temp 1.3 RISE 1.2 FALL 1.1 1 0.9 0.8 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs Switching 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0 Number of Outputs Switching Delta Tpd vs Output Loading ...
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... GAL16V8D-7 (Except IND PLCC)/-10L: Typical AC and DC Characteristic Diagrams Vol vs Iol 0.5 0.4 0.3 0.2 0 Iol (mA) Normalized Icc vs Vcc 1.1 1 0.9 0.8 3 3.15 3.3 3.45 Supply Voltage (V) Delta Icc vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Vin (V) Voh vs Ioh ...
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... GAL16V8D-10Q (and Slower): Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 1.2 PT H->L PT L->H 1.1 1 0.9 0.8 0.7 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0.2 -0.4 -0.6 -0 Number of Outputs Switching Delta Tpd vs Output Loading 12 10 RISE 8 FALL ...
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... GAL16V8D-10Q (and Slower): Typical AC and DC Characteristic Diagrams Vol vs Iol 0.6 0.4 0 Iol (mA) Normalized Icc vs Vcc 1.2 1.1 1 0.9 0.8 4.50 4.75 5.00 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 Vin (V) Voh vs Ioh Ioh (mA) Normalized Icc vs Temp 1.3 1.2 1.1 1 0.9 0.8 0.7 5.50 -55 - ...