HN58V256AT-12 HITACHI [Hitachi Semiconductor], HN58V256AT-12 Datasheet

Manufacturer Part Number

HN58V256AT-12

Description

256k EEPROM (32-kword x 8-bit) Ready/Busy and RES function (HN58V257A)

Manufacturer

HITACHI [Hitachi Semiconductor]

Datasheet

1.HN58V256AT-12.pdf (24 pages)

Description

The Hitachi HN58V256A and HN58V257A are electrically erasable and programmable ROMs organized as

32768-word

employing advanced MNOS memory technology and CMOS process and circuitry technology. They also

have a 64-byte page programming function to make their write operations faster.

Features

Single 3 V supply: 2.7 to 5.5 V

Access time: 120 ns max

Power dissipation:

On-chip latches: address, data, CE, OE, WE

Automatic byte write: 10 ms max

Automatic page write (64 bytes): 10 ms max

Ready/Busy (only the HN58V257A series)

Data polling and Toggle bit

Data protection circuit on power on/off

Conforms to JEDEC byte-wide standard

Reliable CMOS with MNOS cell technology

10 years data retention

Software data protection

Write protection by RES pin (only the HN58V257A series)

Industrial versions (Temperature range: – 20 to 85˚C and – 40 to 85˚C) are also available.

Active: 20 mW/MHz, (typ)

Standby: 110 µW (max)

erase/write cycles (in page mode)

8-bit. They have realized high speed, low power consumption and high reliability by

Ready/Busy and RES function (HN58V257A)

256k EEPROM (32-kword 8-bit)

HN58V256A Series

HN58V257A Series

ADE-203-357D (Z)

Oct. 24, 1997

Rev. 4.0