A29L004UW-70 AMICC [AMIC Technology], A29L004UW-70 Datasheet - Page 10

• Manufacturer Part Number: A29L004UW-70
• Description: 512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
• Manufacturer: AMICC [AMIC Technology]

Sector Protection/Unprotection
The hardware sector protection feature disables both
program and erase operations in any sector. The hardware
sector unprotection feature re-enables both program and
erase operations in previously protected sectors.
It is possible to determine whether a sector is protected or
unprotected. See “Autoselect Mode” for details.
Sector protection / unprotection can be implemented via two
methods. The primary method requires VID on the
and can be implemented either in-system or via programming
equipment. Figure 2 shows the algorithm and the Sector
Protect / Unprotect Timing Diagram illustrates the timing
waveforms for this feature. This method uses standard
microprocessor bus cycle timing. For sector unprotect, all
unprotected sectors must first be protected prior to the first
sector unprotect write cycle. The alternate method must be
implemented using programming equipment. The procedure
requires a high voltage (V
control pins.
The device is shipped with all sectors unprotected.
It is possible to determine whether a sector is protected or
unprotected. See "Autoselect Mode" for details.
Hardware Data Protection
The requirement of command unlocking sequence for
programming or erasing provides data protection against
inadvertent writes (refer to the Command Definitions table).
In addition, the following hardware data protection measures
prevent accidental erasure or programming, which might
otherwise be caused by spurious system level signals during
V
powered up to read array data to avoid accidentally writing
data to the array.
Write Pulse "Glitch" Protection
Noise pulses of less than 5ns (typical) on
do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of
Power-Up Write Inhibit
If
device does not accept commands on the rising edge of
reading array data on the initial power-up.
PRELIMINARY
RESET pin only (N/A on 32-pin PLCC & (s)TSOP packages),
CE
WE
WE
CC
WE
power-up transitions, or from system noise. The device is
= V
. The internal state machine is automatically reset to
must be a logical zero while
=
IH
CE
or
WE
= V
(October, 2002, Version 0.0)
IL
= V
and
IH
. To initiate a write cycle,
OE
ID
) on address pin A9 and the
= V
OE
IH
is a logical one.
during power up, the
OE
,
CE
OE
CE
or
=V
WE
and
IL
,
10
Temporary Sector Unprotect (N/A on 32-pin PLCC &
(s)TSOP packages)
This feature allows temporary unprotection of previous
protected sectors to change data in-system. The Sector
Unprotect mode is activated by setting the RESET pin to V
During this mode, formerly protected sectors can be
programmed or erased by selecting the sector addresses.
Once V
protected sectors are protected again. Figure 1 shows the
algorithm, and the Temporary Sector Unprotect diagram
shows the timing waveforms, for this feature.
Notes:
1. All protected sectors unprotected.
2. All previously protected sectors are protected once again.
ID
Figure 1. Temporary Sector Unprotect Operation
is removed from the RESET pin, all the previously
Program Operations
Completed (Note 2)
Temporary Sector
Perform Erase or
RESET = V
RESET = V
Unprotect
(Note 1)
START
AMIC Technology, Corp.
A29L004 Series
ID
IH
ID
.