A29L004UW-70 AMICC [AMIC Technology], A29L004UW-70 Datasheet - Page 18

• Manufacturer Part Number: A29L004UW-70
• Description: 512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
• Manufacturer: AMICC [AMIC Technology]

I/O
I/O
exceeded a specified internal pulse count limit. Under these
conditions I/O
that indicates the program or erase cycle was not
successfully completed.
The I/O
program a "1 "to a location that is previously programmed to
"0." Only an erase operation can change a "0" back to a "1."
Under this condition, the device halts the operation, and
when the operation has exceeded the timing limits, I/O
produces a "1."
Under both these conditions, the system must issue the
reset command to return the device to reading array data.
I/O
After writing a sector erase command sequence, the
system may read I/O
operation has begun. (The sector erase timer does not
apply to the chip erase command.) If additional sectors are
selected for erasure, the entire time-out also applies after
each additional sector erase command. When the time-out
is complete, I/O
ignore I/O
between additional sector erase commands will always be
less than 50 s. See also the "Sector Erase Command
Sequence" section.
After the sector erase command sequence is written, the
system should read the status on I/O
I/O
command sequence, and then read I/O
internally controlled erase cycle has begun; all further
commands (other than Erase Suspend) are ignored until
the erase operation is complete. If I/O
accept additional sector erase commands. To ensure the
command has been accepted, the system software should
check the status of I/O
subsequent sector erase command. If I/O
second status check, the last command might not have
been accepted. Table 6 shows the outputs for I/O
PRELIMINARY
5
6
5
3
: Exceeded Timing Limits
: Sector Erase Timer
(Toggle Bit I) to ensure the device has accepted the
indicates whether the program or erase time has
5
failure condition may appear if the system tries to
3
if the system can guarantee that the time
5
3
produces a "1." This is a failure condition
switches from "0" to "1." The system may
(October, 2002, Version 0.0)
3
to determine whether or not an erase
3
prior to and following each
3
is "0", the device will
7
3
. If I/O
(
Data
3
is high on the
3
Polling) or
3
is "1", the
.
5
18
Notes :
1. Read toggle bit twice to determine whether or not it is
2. Recheck toggle bit because it may stop toggling as I/O
toggling. See text.
changes to "1". See text.
No
Figure 6. Toggle Bit Algorithm
Commplete, Write
Reset Command
Read I/O
Program/Erase
Read I/O
Read I/O
Operation Not
AMIC Technology, Corp.
= Toggle ?
= Toggle ?
Toggle Bit
Toggle Bit
I/O
START
Twice
5
= 1?
7
7
7
A29L004 Series
Yes
Yes
Yes
-I/O
-I/O
- I/O
0
0
0
(Note 1)
(Notes 1,2)
Operation Complete
No
No
Program/Erase
5