ISP1130DL Philips Semiconductors, ISP1130DL Datasheet - Page 49

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ISP1130DL

Manufacturer Part Number
ISP1130DL
Description
Universal Serial Bus compound hub with integrated keyboard controller
Manufacturer
Philips Semiconductors
Datasheet
Table 79: I2C0DAT register: bit allocation
Table 81: I2C0STA register: bit allocation
Philips Semiconductors
9397 750 06895
Objective specification
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
R/W
R
7
0
7
1
Table 77: I2C0CON register: bit description
[1]
Table 78: I
Table 80: I2C0DAT register: bit description
[1]
Bit
I2C0CON.2
I2C0CON.1
I2C0CON.0
Bit
7 to 0
R/W
R
CR2
6
0
6
1
[1]
All bits are individually addressable.
Bits are transmitted or received MSB (SD7) first.
0
0
0
0
1
1
1
1
2
C-bus bit frequency (Master mode)
SC[4:0]
Symbol
SD[7:0]
R/W
CR1
Symbol
AA
CR1
CR0
R
5
0
5
1
0
0
1
1
0
0
1
1
Rev. 01 — 23 March 2000
[1]
CR0
R/W
0
1
0
1
0
1
0
1
Description
DATA byte (just received or to be transmitted); a logic 0 value
corresponds with a LOW level on SDA, a logic 1 with a HIGH
level
R
4
0
4
1
Description
Assert Acknowledge. A logic 1 indicates that an ACK (low
level on SDA during acknowledge pulse on SCL) is returned
for one of the following conditions:
selects I
selects I
SD[7:0]
own slave address received
General Call address received, if bit GC = 1 (I2C0CON)
data byte received when in master receive mode
data byte received when addressed in slave receiver
mode.
USB compound hub with keyboard controller
2
2
C-bus bit frequency in Master mode, see
C-bus bit frequency in Master mode, see
R/W
I
2
R
3
0
3
1
C-bus bit frequency (12 MHz oscillator)
…continued
R/W
R
2
0
2
0
-
3.75 kHz
200 kHz
300 kHz
400 kHz
100 kHz
7.5 kHz
50 kHz
75 kHz
© Philips Electronics N.V. 2000. All rights reserved.
R/W
R
1
0
1
0
-
ISP1130
Table 78
Table 78
R/W
R
0
0
0
0
-
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