HMP8117CN Intersil Corporation, HMP8117CN Datasheet - Page 20

• Manufacturer Part Number: HMP8117CN
• Description: NTSC/PAL Video Decoder
• Manufacturer: Intersil Corporation

“RAW” VBI DATA CAPTURE
“Raw” data capture of VBI data during blanked scan lines
may be optionally implemented. In this instance, the active
line time of blanked scan lines are sampled at the CLK2 rate,
and output onto the pixel outputs. This permits software
decoding of the VBI data to be done.
The line mask registers specify on which scan lines to
generate “raw” VBI data. If the RAW VBI All bit is enabled, all
the video lines are treated as raw VBI data, excluding the
equalization and serration lines.
The start and end timing of capturing “raw” VBI data on a
scan line is determined by the Start and End Raw VBI
Registers. This allows the proper capture of “raw” VBI data
regardless of the BLANK# output timing for active video.
NOTES:
During PAL (M) operation, the first possible line of VBI data
is lines 7 and 269, and the last possible lines are the last
blanked scan lines. Lines 523-6 and 261-268 are always
blanked.
Real Time Control Interface
The Real Time Control Interface (RTCI) outputs timing
information for a NTSC/PAL encoder as BT.656 ancillary
data. This allows the encoder to generate “clean” output
video.
RTCI information via BT.656 ancillary data is shown in Table
9. If enabled, this transfer occurs once per line and is
completed before the start of the SAV sequence.
38. ep = even parity for P8-P13.
39. CRC = Sum of P8-P14 of Data ID through last user data word. Preset to all zeros, carry is ignored.
Data Block Number
Data Word Count
PIXEL INPUT
Increment
Increment
Preamble
FSCPLL
Data ID
HPLL
CRC
20
TABLE 9. OUTPUTTING RTCI AS BT.656 ANCILLARY DATA
P15
P14
P14
P14
P14
P14
P14
P14
P14
P14
P14
P14
P14
0
1
1
bit 6
P14
ep
ep
ep
ep
ep
ep
ep
ep
ep
ep
ep
0
1
1
HMP8117
F2 = 0
PSW
P13
bit 5
0
1
1
1
0
0
0
0
0
0
0
0
The blanking level is subtracted from the “raw” VBI data
samples, and the result is output onto the pixel outputs.
Note both “sliced” and “raw” VBI data may be available on
the same line.
During NTSC operation, the first possible line of VBI data is
lines 10 and 272, and the last possible lines are the last
blanked scan lines. Lines 1-9 and 264-271 are always
blanked.
During PAL (B, D, G, H, I, N, N
line of VBI data are lines 6 and 318, and the last possible
lines are the last blanked scan lines. Lines 623-5 and 311-
317 are always blanked.
The PSW bit is always a “0” for NTSC encoding. During PAL
encoding, it indicates the sign of V (“0” = negative;
“1” = positive) for that scan line.
Host Interface
All internal registers may be written to or read by the host
processor at any time, except for those bits identified as
read-only. The bit descriptions for the control registers are
listed beginning with Table 10.
The HMP8117 supports the fast-mode (up to 400kbps) I
interface consisting of the SDA and SCL pins. The device
acts as a slave for receiving and transmitting data over the
serial interface. When the interface is not active, SCL and
F1 = 0
P12
bit 4
0
1
1
1
0
0
0
0
0
0
0
0
0
:
bit 31
bit 27
bit 7
bit 3
bit 3
P11
0
1
1
0
0
0
0
0
0
0
bit 30
bit 26
bit 6
bit 2
bit 2
P10
C
0
1
1
1
0
0
0
0
0
0
) operation, the first possible
bit 29
bit 25
bit 5
bit 1
bit 1
P9
0
1
1
0
0
1
0
0
0
0
bit 28
bit 24
bit 4
bit 0
bit 0
P8
0
1
1
1
1
1
0
0
0
0
2
C