PEF2091 Siemens Semiconductor Group, PEF2091 Datasheet - Page 92
PEF2091
Manufacturer Part Number
PEF2091
Description
ICs for Communications(ISDN Echocancellation Circuit)
Manufacturer
Siemens Semiconductor Group
Datasheet
1.PEF2091.pdf
(298 pages)
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3.11
Two pins PS1 and PS2 are available for comfortably surveying and controlling the power
status.
In addition, if the stand-alone mode is being used, a third pin (DISS) is also available.
In NT mode, power status bits 1 and 2 (PS1/2) are used to monitor both primary and
secondary NT power supply. This information is transferred via the overhead bit channel
to the exchange side. For operational details, see "Monitoring Primary and Secondary
NT Power Supply", page 194.
In LT mode the first power status bit (PS1) is used to monitor the remote power feed
circuit of the subscriber line. For operational details, see "Monitoring Remote Power
Feed Circuit in LT Modes", page 194.
The pin PS2 provides a serial interface in order to read in the value of the current fed to
the subscriber line by the power controller. This function is available only in combination
with a power controller which supports this feature (the IEPC does not). For operational
details, see "Monitoring Power Feed Current in LT Modes", page 194.
If the stand-alone mode is being used the following features are also available.
In the NT and TE modes the output pin disable (DISS) is set to (1) if the EOC-command
"close complete loop" (LBBD) has been detected by the NT. This function is only
available in EOC Auto mode. It may be used to test a secondary power source (e.g.
battery check). For operational details, see "Access to Pin DISS", page 195.
In the LT modes the DISS-pin is used for switching off the remote power supply of the
subscriber line. For operational details, see "Access to Pin DISS", page 195.
3.12
Note 24: This chapter applies only in the microprocessor mode (PMODE = "1").
The undervoltage detector is enabled by setting the ADF:UVD bit to "1", see
"ADF-Register", page 219. Note that the default setting of this bit after power on will be
"1", i.e. the undervoltage detection feature will be activated. It activates the reset signal
if the supply voltage drops below the threshold U
and "Undervoltage Detection Timing", page 280).
It also acts as power on reset by creating a reset pulse on pin RST if the supply voltage
rises above U
again below the threshold level U
information).
Power Status
Undervoltage Detection
H
(typically 4.30 V). It then stays inactive until the supply voltage drops
L
(see also "Power On Reset (POR)", page 93, for more
92
L
(typically 4.21 V, see Figure 37 below
Functional Description
Data Sheet 01.99
PEB 2091
PEF 2091
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