SAF-C502-2R20N Siemens Semiconductor Group, SAF-C502-2R20N Datasheet - Page 32

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SAF-C502-2R20N

Manufacturer Part Number
SAF-C502-2R20N
Description
8-Bit CMOS Microcontroller
Manufacturer
Siemens Semiconductor Group
Datasheet
Power Saving Modes
Two power down modes are available, the Idle Mode and the Power Down Mode.
The bits PDE, PDS and IDLE, IDLS select the Power Down mode or the idle mode, respectively. If
the Power Down mode and the idle mode are set at the same time, Power Down takes precedence.
Table 15 gives a general overview of the power saving modes.
Table 15
Entering and Leaving the Power Saving Modes
Mode
Idle mode
Power Down
Mode
In the Power Down mode of operation,
be ensured, however, that
is restored to its normal operating level, before the Power Down mode is terminated. The reset
signal that terminates the Power Down mode also restarts the oscillator. The reset should not be
activated before
to allow the oscillator to restart and stabilize (similar to power-on reset).
Semiconductor Group
V
Entering
Example
ORL PCON, #01H
ORL PCON, #20H
ORL PCON, #02H
ORL PCON, #40H
CC
is restored to its normal operating level and must be held active long enough
V
CC
is not reduced before the Power Down mode is invoked, and that
V
Leaving by
– enabled interrupt
– Hardware Reset
Hardware Reset
CC
can be reduced to minimize power consumption. It must
31
Remarks
CPU is gated off
CPU status registers maintain
their data.
Peripherals are active
Double instruction sequence
Oscillators are stopped. Contents
of on-chip RAM and SFR’s are
maintained (leaving Power
Down Mode means redefinition
of SFR’s contents.)
Double instruction sequence
C502
V
CC

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