SAF-C505-2RM Siemens Semiconductor Group, SAF-C505-2RM Datasheet - Page 40
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SAF-C505-2RM
Manufacturer Part Number
SAF-C505-2RM
Description
8-Bit CMOS Microcontroller
Manufacturer
Siemens Semiconductor Group
Datasheet
1.SAF-C505-2RM.pdf
(85 pages)
- Current page: 40 of 85
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8-Bit A/D Converter (C505 and C505C only)
The C505/C505C includes a high performance / high speed 8-bit A/D converter (ADC) with 8 analog
input channels. It operates with a successive approximation technique and provides the following
features:
The 8-bit ADC uses two clock signals for operation : the conversion clock
input clock
pins via the ADC clock prescaler as shown in figure 17. The input clock is equal to
conversion clock
prescaler must be programmed to a value which assures that the conversion clock does not exceed
1.25 MHz. The prescaler ratio is selected by the bits ADCL1 and ADCL0 of SFR ADCON1.
Figure 17
8-Bit A/D Converter Clock Selection
Semiconductor Group
– 8 multiplexed input channels (port 1), which can also be used as digital outputs/inputs
– 8-bit resolution
– Internal start-of-conversion trigger
– Interrupt request generation after each conversion
– Single or continuous conversion mode
MCU System Clock
Rate (
10 MHz
12 MHz
16 MHz
20 MHz
2 MHz
5 MHz
6 MHz
f
IN
f
OSC
(1/
t
Condition:
f
IN
f
OSC
)
ADC
).
f
ADC
is limited to a maximum frequency of 1.25 MHz. Therefore, the ADC clock
f
ADC max
is derived from the C505 system clock
f
[MHz]
10
12
16
20
IN
2
5
6
ADCL1
Clock Prescaler
32
16
8
4
< 1.25 MHz
MUX
Prescaler
Ratio
4
4
8
8
16
16
16
ADCL0
f
Conversion Clock
IN
= f
40
OSC
Input Clock
f
[MHz]
0.5
1.25
0.75
1.25
0.75
1
1.25
=
ADC
CLP
1
f
ADC
f
IN
f
OSC
ADCL1
0
0
0
0
1
1
1
which is applied at the XTAL
Converter
A / D
f
ADC
MCS03299
C505A / C505CA
ADCL0
0
0
1
1
0
0
0
(=1/
C505 / C505C
t
ADC
1997-12-01
f
OSC
) and the
. The
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