SAF-C505-2RM Siemens Semiconductor Group, SAF-C505-2RM Datasheet - Page 54
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SAF-C505-2RM
Manufacturer Part Number
SAF-C505-2RM
Description
8-Bit CMOS Microcontroller
Manufacturer
Siemens Semiconductor Group
Datasheet
1.SAF-C505-2RM.pdf
(85 pages)
- Current page: 54 of 85
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The following table 12 contains the functional description of all C505A/C505CA pins which are
required for OTP memory programming.
Table 12
Pin Definitions and Functions in Programming Mode
Symbol
RESET
PMSEL0
PMSEL1
PSEL
PRD
PALE
XTAL2
XTAL1
V
V
*) I = Input
Semiconductor Group
SS
CC
O = Output
4
5
7
8
9
10
14
15
16
17
Pin Number I/O
*)
I
I
I
I
I
I
O
I
–
–
Function
Reset
This input must be at static “1“ (active) level during the whole
programming mode.
Programming mode selection pins
These pins are used to select the different access modes in
programming mode. PMSEL1,0 must satisfy a setup time to the
rising edge of PALE. When the logic level of PMSEL1,0 is
changed, PALE must be at low level.
Basic programming mode select
This input is used for the basic programming mode selection
and must be switched according figure 3-1.
Programming mode read strobe
This input is used for read access control for OTP memory
read, Version Register read, and lock bit read operations.
Programming address latch enable
PALE is used to latch the high address lines. The high address
lines must satisfy a setup and hold time to/from the falling edge
of PALE. PALE must be at low level when the logic level of
PMSEL1,0 is changed.
XTAL2
Output of the inverting oscillator amplifier.
XTAL1
Input to the oscillator amplifier.
Circuit ground potential
must be applied in programming mode.
Power supply terminal
must be applied in programming mode.
PMSEL1
0
0
1
1
54
PMSEL0
0
1
0
1
Access Mode
Reserved
Read version bytes
Program/read lock bits
Program/read OTP memory byte
C505A / C505CA
C505 / C505C
1997-12-01
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