24AA32 MicrochipTechnology, 24AA32 Datasheet
24AA32
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24AA32 Summary of contents
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... The 24AA32 is capable of both random and sequential reads up to the 32K boundary. Functional address lines allow 24AA32 devices on the same bus, for up to 256K bits address space. Advanced CMOS technology and broad voltage range make this ...
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... ELECTRICAL CHARACTERISTICS 1.1 Maximum Ratings* V ..................................................................................7.0V CC All inputs and outputs w.r.t. V ............... -0. Storage temperature ..................................... -65˚C to +150˚C Ambient temp. with power applied ................ -65˚C to +125˚C Soldering temperature of leads (10 seconds) ............. +300˚C ESD protection on all pins *Notice: Stresses above those listed under “Maximum Ratings” ...
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... Schmitt trigger inputs which provide improved T HIGH DAT SU DAT 24AA32 Units Remarks kHz (Note 1) ns (Note1) ns After this period the first clock pulse is generated ns Only relevant for repeated START condition ns ns ...
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... NOT generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave (24AA32) will leave the data line HIGH to enable the master to generate the STOP condition. (D) ...
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... SDA bus checking the device type identifier being transmitted. Upon receiving a 1010 code and appropri- ate device select bits, the slave device outputs an acknowledge signal on the SDA line. Depending on the state of the R/W bit, the 24AA32 will select a read or write operation. FIGURE 3-3: ADDRESS SEQUENCE BIT ASSIGNMENTS ...
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... Page Write The write control byte, word address and the first data byte are transmitted to the 24AA32 in the same way byte write. But instead of generating a stop condi- tion, the master transmits up to eight pages of eight data bytes each (64 bytes total) which are temporarily stored in the on-chip page cache of the 24AA32 ...
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... To perform this type of read operation, first the word address must be set. This is done by sending the word address to the 24AA32 as part of a write operation (R/W bit set to 0). After the word address is sent, the master generates a start condition following the acknowledge. This termi- nates the write operation, but not before the internal address pointer is set ...
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... The device select bits A2, A1, A0 can be used to expand the contiguous address space for up to 256K bits by adding up to eight 24AA32's on the same bus. In this case, software can use A0 of the control byte as address bit A12 address bit A13, and A2 as address bit A14 ...
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... PIN DESCRIPTIONS 7.1 A0, A1, A2 Chip Address Inputs The A0..A2 inputs are used by the 24AA32 for multiple device operation and conform to the two-wire bus stan- dard. The levels applied to these pins define the address block occupied by the device in the address map. A particular device is selected by transmitting the corresponding bits (A2, A1, A0) in the control byte (Figure 3-3) ...
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... FIGURE 7-1: CACHE WRITE TO THE ARRAY STARTING AT A PAGE BOUNDARY 1 Write command initiated at byte 0 of page 3 in the array; First data byte is loaded into the cache byte 0. cache page 0 cache cache • • • byte 0 byte 1 3 Write from cache into array initiated by STOP bit. ...
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... Product Identification System To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed sales offices. 24AA32 - /P Package: Temperature Range: Device: 1996 Microchip Technology Inc Plastic DIP (300 mil Body), 8-lead SN = Plastic SOIC (150 mil Body), 8-lead Blank = 0˚ ...
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W ORLDWIDE AMERICAS Corporate Office Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 602 786-7200 Fax: 602 786-7277 Technical Support: 602 786-7627 Web: http://www.microchip.com Atlanta Microchip Technology Inc. 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 ...