24AA65 MicrochipTechnology, 24AA65 Datasheet

no-image

24AA65

Manufacturer Part Number
24AA65
Description
64K1.8VI2COSmartSerialOEEPROM
Manufacturer
MicrochipTechnology
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
24AA65-SM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
24AA65/P
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
24AA65/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
24AA65/SM
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
24AA65/SM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
24AA65T
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
24AA65T/SM
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
24AA65T/SM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
FEATURES
• Voltage operating range: 1.8V to 6.0V
• Industry standard two wire bus protocol I
• 8 byte page, or byte modes available
• 2 ms typical write cycle time, byte or page
• 64-byte line input cache for fast write loads
• Up to 8 devices may be connected to the same
• 100 kHz (1.8V) and 400 kHz (5.0V) compatibility
• Programmable block security options
• Programmable endurance options
• Schmitt trigger, filtered inputs for noise suppres-
• Output slope control to eliminate ground bounce
• Self-timed ERASE and WRITE cycles
• Power on/off data protection circuitry
• Endurance:
• Electrostatic discharge protection > 4000V
• Data retention > 200 years
• 8-pin PDIP/SOIC packages
• Temperature ranges
DESCRIPTION
The Microchip Technology Inc. 24AA65 is a “smart” 8K x
8 Serial Electrically Erasable PROM. This device has
been developed for advanced, low power applications
such as personal communications, and provides the
systems designer with flexibility through the use of many
new user-programmable features. It is capable of opera-
tion down to 1.8V, the end-of-life voltage for 2 “AA” bat-
tery cells for most popular battery technologies.The
24AA65 offers a relocatable 4K bit block of ultra-high-
endurance memory for data that changes frequently. The
remainder of the array, or 60K bits, is rated at 1,000,000
ERASE/WRITE (E/W) cycles guaranteed. The 24AA65
features an input cache for fast write loads with a capac-
ity of eight pages, or 64 bytes. This device also features
programmable security options for E/W protection of crit-
ical data and/or code of up to fifteen 4K blocks. Func-
tional address lines allow the connection of up to eight
I
Smart Serial is a trademark of Microchip Technology Inc.
2
C is a trademark of Philips Corporation.
1996 Microchip Technology Inc.
- Peak write current 3 mA at 6.0V
- Maximum read current 150 A at 6.0V
- Standby current 1 A typical
compatible
bus for up to 512K bits total memory
sion
- 10,000,000 E/W cycles guaranteed for a High
- 1,000,000 E/W cycles guaranteed for a Stan-
- Commercial (C):
Endurance Block
dard Endurance Block
64K 1.8V I
0 C to +70 C
This document was created with FrameMaker 4 0 4
2
C Smart Serial EEPROM
2
C
PACKAGE TYPES
BLOCK DIAGRAM
24LC65's on the same bus for up to 512K bits contigu-
ous EEPROM memory. Advanced CMOS technology
makes this device ideal for low-power non-volatile code
and data applications. The 24AA65 is available in the
standard 8-pin plastic DIP and 8-pin surface mount
SOIC package.
PDIP
SOIC
SDA
Control
I/O
Logic
I/O
Vcc
Vss
SCL
V
A0
A1
A2
SS
V
A0
A1
A2
SS
A0..A2
Memory
Control
Logic
1
2
3
4
1
2
3
4
24AA65
XDEC
HV Generator
8
7
6
5
8
7
6
5
EEPROM ARRAY
DS21056F-page 1
Page Latches
Sense AMP
R/W Control
Buffer
V
NC
SCL
SDA
YDEC
V
NC
SCL
SDA
CC
CC

Related parts for 24AA65

24AA65 Summary of contents

Page 1

... Temperature ranges - Commercial (C +70 C DESCRIPTION The Microchip Technology Inc. 24AA65 is a “smart” Serial Electrically Erasable PROM. This device has been developed for advanced, low power applications such as personal communications, and provides the systems designer with flexibility through the use of many new user-programmable features capable of opera- tion down to 1.8V, the end-of-life voltage for 2 “ ...

Page 2

... ELECTRICAL CHARACTERISTICS 1.1 Maximum Ratings* V ..................................................................................7.0V CC All inputs and outputs w.r.t. V ............... -0. Storage temperature ...................................... -65˚C to+150˚C Ambient temp. with power applied ................ -65˚C to +125˚C Soldering temperature of leads (10 seconds) ............. +300˚C ESD protection on all pins *Notice : Stresses above those listed under “Maximum Ratings” ...

Page 3

... Schmitt trigger inputs which provide improved specification for standard operation HIGH DAT SU DAT 24AA65 Units Remarks kHz — ns — (Note 1) ns (Note 1) — ns After this period the first clock pulse is gen- erated — ...

Page 4

... NOT generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave (24AA65) must leave the data line HIGH to enable the master to generate the STOP condition. (D) ...

Page 5

... A control byte is the first byte received following the start condition from the master device. The control byte consists of a four bit control code, for the 24AA65 this is set as 1010 binary for read and write operations. The next three bits of the control byte are the device select bits (A2, A1, A0) ...

Page 6

... FIGURE 4-2: PAGE WRITE (FOR CACHE WRITE, SEE FIGURE 8- Bus Activity: Control r Master Byte t SDA Line Bus Activity C K FIGURE 4-3: CURRENT ADDRESS READ S T BUS ACTIVITY A MASTER R T SDA LINE S BUS ACTIVITY FIGURE 4-4: RANDOM READ S T CONTROL WORD ...

Page 7

... To perform this type of read operation, first the word address must be set. This is done by sending the word address to the 24AA65 as part of a write operation (R/W bit set to 0). After the word address is sent, the master generates a start condition following the acknowledge. This termi- nates the write operation, but not before the internal address pointer is set ...

Page 8

... After the third byte is sent to the device, it will acknowledge and a STOP bit is then sent by the master to complete the command. During a normal write sequence attempt is made to write to a protected address, no data will be written and the device will not report an error or abort the com- mand ...

Page 9

... PIN DESCRIPTIONS 8.1 A0, A1, A2 Chip Address Inputs The A0..A2 inputs are used by the 24AA65 for multiple device operation and conform to the two-wire bus stan- dard. The levels applied to these pins define the address block occupied by the device in the address map. A particular device is selected by transmitting the corresponding bits (A2, A1, A0) in the control byte (Figure 3-2 and Figure 8-1) ...

Page 10

... FIGURE 8-1: CONTROL SEQUENCE BIT ASSIGNMENTS Control Byte Address Byte Slave Device Address Select Bits Security Read S t Acknowledges from Device ...

Page 11

... Page 0 of cache written to page 3 of array. Write cycle is executed after every page is written. • • • byte 2 byte 3 byte 4 byte 7 page 3 24AA65 cache page 7 • • • bytes 56-63 array row n • • • page 7 • • • page 7 array row beginning ...

Page 12

... Product Identification System To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed sales offices. 24AA65 – /P Package: Temperature Range: Device: AMERICAS Corporate Office Microchip Technology Inc. 2355 West Chandler Blvd. ...

Related keywords