M48Z02 ST Microelectronics, M48Z02 Datasheet
M48Z02
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M48Z02 Summary of contents
Page 1
... RAM which is pin and functional compatible with the DS1220. A special 24 pin 600mil DIP CAPHAT houses the M48Z02/12 silicon with a long life lith- ium button cell to form a highly integrated battery backed-up memory solution. The M48Z02/12 button cell has sufficient capacity ...
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... V CC PROMs without any requirement for special write timing or limitations on the number of writes that 23 A8 can be performed The M48Z02/12 also has its own Power-fail Detect 21 W circuit. The control circuitry constantly monitors the 20 G single 5V supply for an out of tolerance condition. 19 ...
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... Figure 3. Block Diagram LITHIUM CELL VOLTAGE SENSE READ MODE The M48Z02/ the Read Mode whenever W (Write Enable) is high and E (Chip Enable) is low. The device architecture allows ripple-through ac- cess of data from eight of 16,384 locations in the static storage array. Thus, the unique address specified by the 11 Address Inputs defines which one of the 2,048 bytes of data accessed ...
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... OH Notes: 1. Outputs Deselected. 2. Negative spikes of –1V allowed for up to 10ns once per cycle. Table 7. Power Down/Up Trip Points DC Characteristics ( – Symbol V Power-fail Deselect Voltage (M48Z02) PFD V Power-fail Deselect Voltage (M48Z12) PFD V Battery Back-up Switchover Voltage SO t Expected Data Retention Time DR Note: 1 ...
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... Rise Time CC may result in deselection/write protection not occurring until 50 s after F may cause corruption of RAM data. FB tDR tFB rises above V (min) but before normal system operations begin. Even though a power on CC PFD M48Z02, M48Z12 Min Max 0 300 tRB tREC ...
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... G DQ0-DQ7 Note: Write Enable (W) = High. 6/12 = 4.75V to 5.5V or 4.5V to 5.5V) CC -70 Min Max tAVAV VALID tAVQV tELQV tELQX tGLQV tGLQX M48Z02 / M48Z12 -150 -200 Min Max Min Max 150 200 150 200 150 200 tAXQX ...
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... Write Enable High to Output Transition WHQX WRITE MODE The M48Z02/ the Write Mode whenever W and E are active. The start of a write is referenced from the latter occurring falling edge write is terminated by the earlier rising edge The addresses must be held valid throughout the cycle ...
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... M48Z02, M48Z12 Figure 7. Write Enable Controlled, Write AC Waveforms A0-A10 E W DQ0-DQ7 Figure 8. Chip Enable Controlled, Write AC Waveforms A0-A10 E W DQ0-DQ7 8/12 tAVAV VALID tAVWH tAVEL tWLWH tAVWL tWLQZ tAVAV VALID tAVEH tAVEL tELEH tAVWL tDVEH tWHAX tWHQX tWHDX DATA INPUT tDVWH AI01331 ...
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... PFD be assured the memory will write protected fall time is not less than t state, provided the V CC The M48Z02/12 may respond to transient noise spikes on V that reach into the deselect window CC during the time the device is sampling V fore, decoupling of the power supply lines is rec- ommended ...
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... M48Z02, M48Z12 ORDERING INFORMATION SCHEME Example: Supply Voltage and Write Protect Voltage 4.75V to 5. 4.5V to 4.75V PFD 4. 4.2V to 4.5V PFD For a list of available options (Speed, Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. ...
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... Drawing is not to scale. mm Min Max 8.89 9.65 0.38 0.76 8.38 8.89 0.38 0.53 1.14 1.78 0.20 0.31 34.29 34.80 17.83 18.34 2.29 2.79 25.15 30.73 15.24 16.00 3.05 3. M48Z02, M48Z12 inches Typ Min Max 0.350 0.380 0.015 0.030 0.330 0.350 0.015 0.021 0.045 0.070 0.008 0.012 1.350 1.370 0.702 0.722 0.090 0.110 0.990 1.210 0.600 0.630 0.120 0.150 PCDIP 11/12 ...
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... M48Z02, M48Z12 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...