GAL22V10 Lattice Semiconductor, GAL22V10 Datasheet

no-image

GAL22V10

Manufacturer Part Number
GAL22V10
Description
High Performance E2CMOS PLD Generic Array Logic
Manufacturer
Lattice Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
GAL22V10-10LC/883
Manufacturer:
LATTICE
Quantity:
496
Part Number:
GAL22V10-10LD/883
Manufacturer:
LATTICE
Quantity:
548
Part Number:
GAL22V10-15LC/883
Manufacturer:
LATTICE
Quantity:
598
Part Number:
GAL22V10-15LD/883
Manufacturer:
MOT
Quantity:
201
Part Number:
GAL22V10-15LD/883
Manufacturer:
LATTICE
Quantity:
628
Part Number:
GAL22V10-15LD/883C
Manufacturer:
LATTICE
Quantity:
1 043
Part Number:
GAL22V10-15LNC
Manufacturer:
L
Quantity:
6 244
Part Number:
GAL22V10-15LP
Manufacturer:
IDT
Quantity:
210
Part Number:
GAL22V10-15LP
Manufacturer:
LATTICE
Quantity:
1 000
Part Number:
GAL22V10-15LP
Manufacturer:
LATTICE
Quantity:
20 000
Part Number:
GAL22V10-15LVC
Manufacturer:
CYPRESS
Quantity:
9 410
Part Number:
GAL22V10-15LVC
Manufacturer:
NS/国半
Quantity:
20 000
• HIGH PERFORMANCE E
• ACTIVE PULL-UPS ON ALL PINS
• COMPATIBLE WITH STANDARD 22V10 DEVICES
• 50% to 75% REDUCTION IN POWER VERSUS BIPOLAR
• E
• TEN OUTPUT LOGIC MACROCELLS
• PRELOAD AND POWER-ON RESET OF REGISTERS
• APPLICATIONS INCLUDE:
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
ESCRIPTION
The GAL22V10, at 4ns maximum propagation delay time, combines
a high performance CMOS process with Electrically Erasable (E
floating gate technology to provide the highest performance avail-
able of any 22V10 device on the market. CMOS circuitry allows
the GAL22V10 to consume much less power when compared to
bipolar 22V10 devices. E
erase times, providing the ability to reprogram or reconfigure the
device quickly and efficiently.
The generic architecture provides maximum design flexibility by
allowing the Output Logic Macrocell (OLMC) to be configured by
the user. The GAL22V10 is fully function/fuse map/parametric com-
patible with standard bipolar and CMOS 22V10 devices.
Unique test circuitry and reprogrammable cells allow complete AC,
DC, and functional testing during manufacture. As a result, Lat-
tice Semiconductor delivers 100% field programmability and func-
tionality of all GAL products. In addition, 100 erase/write cycles and
data retention in excess of 20 years are specified.
Copyright © 2000 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
22v10_06
Features
Description
— 4 ns Maximum Propagation Delay
— Fmax = 250 MHz
— 3.5 ns Maximum from Clock Input to Data Output
— UltraMOS
— Fully Function/Fuse-Map/Parametric Compatible
— 90mA Typical Icc on Low Power Device
— 45mA Typical Icc on Quarter Power Device
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
— Maximum Flexibility for Complex Logic Designs
— 100% Functional Testability
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade
2
CELL TECHNOLOGY
with Bipolar and UVCMOS 22V10 Devices
®
Advanced CMOS Technology
2
technology offers high speed (<100ms)
2
CMOS
®
TECHNOLOGY
2
)
1
Functional Block Diagram
Pin Configuration
NC
I
I
I
I
I
I
I/CLK
11
5
7
9
12
4
I
I
I
I
I
I
I
I
I
I
I
GAL22V10
Specifications GAL22V10
Top View
PLCC
14
2
High Performance E
28
16
26
18
25
23
21
19
I/O/Q
I/O/Q
I/O/Q
NC
I/O/Q
I/O/Q
I/O/Q
Generic Array Logic™
GAL22V10
PRESET
I/CLK
RESET
10
12
14
16
16
12
10
14
GND
8
8
I
I
I
I
I
I
I
I
I
I
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
1
6
12
22V10
2
DIP
GAL
CMOS PLD
August 2000
24
13
18
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
Vcc
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I
I/O/Q

Related parts for GAL22V10

GAL22V10 Summary of contents

Page 1

... CMOS process with Electrically Erasable (E floating gate technology to provide the highest performance avail- able of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much less power when compared to 2 bipolar 22V10 devices. E technology offers high speed (<100ms) erase times, providing the ability to reprogram or reconfigure the device quickly and efficiently ...

Page 2

... GAL22V10 Ordering Information Commercial Grade Specifications ...

Page 3

... This allows each output to be individually configured as either active high or active low. Output Logic Macrocell Configurations Each of the Macrocells of the GAL22V10 has two primary functional modes: registered, and combinatorial I/O. The modes and the output polarity are set by two bits (SO and S1), which are normally controlled by the logic compiler ...

Page 4

... Registered Mode ACTIVE LOW Combinatorial Mode ACTIVE LOW Specifications GAL22V10 ACTIVE HIGH ACTIVE HIGH ...

Page 5

... GAL22V10 Logic Diagram / JEDEC Fuse Map 1 ( 0000 0044 . . . 0396 0440 . . . . 0880 2 (3) 0924 . . . . . 1452 3 (4) 1496 . . . . . . 2112 4 (5) 2156 . . . . . . . 2860 5 (6) 2904 . . . . . . . 3608 6 (7) 3652 . . . . . . 4268 7 (9) 4312 . . . . . 4840 8 (10) 4884 . . . . 5324 9 (11) 5368 . . . 5720 10 (12) 5764 11 (13) 5828, 5829 ... ...

Page 6

... 0. OUT 15MHz Outputs Open toggle 15MHz Outputs Open toggle = Specifications GAL22V10 ) ............................. ............................ - MIN. TYP. 3 MAX. — Vss – 0.5 2.0 — Vcc+1 — — –100 — — — — ...

Page 7

... Refer to fmax Description section. Characterized initially and after any design or process changes that may affect these parameters. Capacitance ( 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL22V10D Specifications GAL22V10 Over Recommended Operating Conditions DESCRIPTION MAXIMUM* UNITS COM COM COM/IND - MIN. MAX. ...

Page 8

... Calculated from fmax with internal feedback. Refer to fmax Description section. 3) Refer to fmax Description section. Capacitance ( 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL22V10D Specifications GAL22V10 Over Recommended Operating Conditions COM / IND -10 MIN. MAX — 2.5 6 — 0 — ...

Page 9

... 0. OUT 15MHz Outputs Open toggle 15MHz Outputs Open toggle = Specifications GAL22V10 ) ............................. ............................ - MIN. TYP. MAX. — Vss – 0.5 2.0 — Vcc+1 — — –100 — — — — ...

Page 10

... Refer to fmax Description section. Characterized initially and after any design or process changes that may affect these parameters. Capacitance ( 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL22V10C Specifications GAL22V10 Over Recommended Operating Conditions COM COM/IND -5 -7 (PLCC) MIN. MAX. MIN. MAX 7 4.5 — ...

Page 11

... MAX. Vin = 0. OUT = 0. 3. 15MHz Outputs Open = 0. 3. 15MHz Outputs Open = Specifications GAL22V10 ) ............................. ............................ - MIN. TYP. 3 MAX. — Vss – 0.5 2.0 — Vcc+1 — — –100 — — — ...

Page 12

... Calculated from fmax with internal feedback. Refer to fmax Description section. 3) Refer to fmax Description section. Capacitance ( 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL22V10B Specifications GAL22V10 Over Recommended Operating Conditions COM COM -7 -10 MIN. MAX. MIN. MAX — ...

Page 13

... OUTPUT Input or I/O to Output Enable/Disable CLK (w/o fdbk) Clock Width INPUT or I/O FEEDBACK DRIVING CLK REGISTERED OUTPUT Synchronous Preset Specifications GAL22V10 INPUT or I/O FEEDBACK VALID INPUT t pd CLK REGISTERED OUTPUT t en CLK REGISTERED FEEDBACK INPUT or I/O FEEDB ACK DRIVI NG AR ...

Page 14

... No Feedback Note: fmax with no feedback may be less than 1/(twh + twl). This is to allow for a clock duty cycle of other than 50 su+ co) CLK 14 Specifications GAL22V10 CLK LOGIC ARRAY REGISTER max with Internal Feedback 1/( su+ Note: tcf is a calculated value, derived by sub- tracting tsu from the period of fmax w/internal feedback (tcf = 1/fmax - tsu) ...

Page 15

... Active Low 300 C Active High Active Low 300 + FROM OUTPUT (O/Q) UNDER TEST INCLUDES TEST FIXTURE AND PROBE CAPACITANCE L GAL22V10D-4 Output Load Conditions (see figure below) GND to 3.0V 1.5ns 10% – 90% Test Condition 2.0ns 10% – 90 10% – 90% 1.5V C 1.5V See Figure ...

Page 16

... JEDEC map (5828 fuses) with any qualified device pro- grammer. Security Cell A security cell is provided in every GAL22V10 device to prevent unauthorized copying of the array patterns. Once programmed, this cell prevents further read access to the functional bits in the device. This cell can only be erased by re-programming the device, so the original configuration can never be examined once this cell is programmed ...

Page 17

... OUTPUT REGISTER ACTIVE HIGH OUTPUT REGISTER Circuitry within the GAL22V10 provides a reset signal to all reg- isters during power-up. All internal registers will have their Q out- puts set low after a specified time (tpr MAX result, the state on the registered output pins (if they are enabled) will be either high or low on power-up, depending on the programmed polarity of the output pins ...

Page 18

... GAL22V10D-4/-5/-7/-10L (PLCC): Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.1 1.05 RISE FALL 1 0.95 0.9 4.5 4.75 5 5.25 Supply Voltage (V) Normalized Tpd vs Temp 1.3 1.2 RISE FALL 1.1 1 0.9 0.8 -55 - 100 Temperature (deg. C) Delta Tpd Outputs 0 -0.1 -0.2 -0 Number of Outputs Switching Delta Tpd vs Output Loading 12 RISE 8 FALL ...

Page 19

... GAL22V10D-4/-5/-7/-10L (PLCC): Typical AC and DC Characteristic Diagrams Vol vs Iol 0.6 0.4 0 Iol (mA) Normalized Icc vs Vcc 1.2 1.1 1 0.9 0.8 4.5 4.75 5 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Vin (V) Specifications GAL22V10 Voh vs Ioh ...

Page 20

... GAL22V10D-7/10L (PDIP): Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.1 1.05 RISE FALL 1 0.95 0.9 4.5 4.75 5 5.25 5.5 Supply Voltage (V) Normalized Tpd vs Temp 1.3 RISE 1.2 FALL 1.1 1 0.9 0.8 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0 Number of Outputs Switching Delta Tpd vs Output Loading ...

Page 21

... GAL22V10D-7/10L (PDIP): Typical AC and DC Characteristic Diagrams Vol vs Iol 0.5 0.4 0.3 0.2 0 Iol (mA) Normalized Icc vs Vcc 1.15 1.1 1.05 1 0.95 0.9 0.85 4.5 4.75 5 5.25 Supply Voltage (V) Delta Isb vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Vin (V) Voh vs Ioh Ioh (mA) Normalized Icc vs Temp 1 ...

Page 22

... GAL22V10D-10Q and Slower (L & Q): Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.1 RISE 1.05 FALL 1 0.95 0.9 4.5 4.75 5 5.25 5.5 Supply Voltage (V) Normalized Tpd vs Temp 1.3 RISE 1.2 FALL 1.1 1 0.9 0.8 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0.4 -0.8 -1 Number of Outputs Switching Delta Tpd vs Output Loading ...

Page 23

... GAL22V10DQ-10 and Slower (L & Q): Typical AC and DC Characteristic Diagrams Vol vs Iol 0.6 0.4 0 Iol (mA) Normalized Icc vs Vcc 1.2 1.1 1 0.9 0.8 4.5 4.75 5 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Vin (V) Specifications GAL22V10 Voh vs Ioh 4.5 4 3.5 3 2.5 2 1 Ioh (mA) Normalized Icc vs Temp 1 ...

Page 24

... GAL22V10C-5/-7/-10: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 0.9 0.8 0.7 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0.25 -0.5 -0.75 -1 -1.25 -1 Number of Outputs Switching Delta Tpd vs Output Loading Output Loading (pF) Normalized Tco vs Vcc 1 ...

Page 25

... GAL22V10C-5/-7/-10: Typical AC and DC Characteristic Diagrams Vol vs Iol 3 2.5 2 1.5 1 0.5 0 0.00 20.00 40.00 60.00 80.00 100.00 Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 Vin (V) Voh vs Ioh 0.00 10.00 20.00 30.00 40.00 50.00 60.00 Ioh(mA) Normalized Icc vs Temp 1.2 1.1 1 0.9 0.8 5.50 -55 - Temperature (deg. C) Input Clamp (Vik) ...

Page 26

... GAL22V10B-7/-10/-15/-25L: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 0.9 0.8 0.7 Temperature (deg. C) Delta Tpd Outputs 0 -0 Number of Outputs Switching Delta Tpd vs Output Loading Output Loading (pF) Normalized Tco vs Vcc 1 ...

Page 27

... GAL22V10B-7/-10/-15/-25L: Typical AC and DC Characteristic Diagrams Vol vs Iol 3 2.5 2 1.5 1 0.5 0 0.00 20.00 40.00 60.00 80.00 100.00 Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 Vin (V) Voh vs Ioh 0.00 10.00 20.00 30.00 40.00 50.00 60.00 Ioh(mA) Normalized Icc vs Temp 1.2 1.1 1 0.9 0.8 5.50 -55 - Temperature (deg. C) Input Clamp (Vik) ...

Page 28

... GAL22V10B-15/-25Q: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 1.1 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 1.2 1.1 1 0.9 0.8 0.7 Temperature (deg. C) Delta Tpd Outputs 0 -0.25 -0.5 -0. Number of Outputs Switching Delta Tpd vs Output Loading Output Loading (pF) Normalized Tco vs Vcc 1.2 1.1 1 0.9 0.8 4.50 4.75 5.00 5.25 Supply Voltage (V) Normalized Tco vs Temp 1 ...

Page 29

... GAL22V10B-15/-25Q: Typical AC and DC Characteristic Diagrams Vol vs Iol 1 0.8 0.6 0.4 0.2 0 0.00 20.00 40.00 Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Delta Icc vs Vin (1 input 0.20 0.70 1.20 1.70 2.20 2.70 3.20 3.70 Vin (V) Specifications GAL22V10 Voh vs Ioh 0.00 10.00 20.00 30.00 40.00 50.00 60.00 70.00 80.00 Ioh(mA) Normalized Icc vs Temp 1.3 1.2 1.1 1 0.9 0.8 0.7 -55 - 100 125 Temperature (deg. C) ...

Related keywords