ISPGDX240VA-9B388I Lattice Semiconductor, ISPGDX240VA-9B388I Datasheet - Page 19

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ISPGDX240VA-9B388I

Manufacturer Part Number
ISPGDX240VA-9B388I
Description
In-System Programmable 3.3V Generic Digital CrosspointTM
Manufacturer
Lattice Semiconductor
Datasheet
The ispGDXV/VA devices provide IEEE1149.1a test
capability and ISP programming through a standard
Boundary Scan Test Access Port (TAP) interface.
The boundary scan circuitry on the ispGDXVA Family
operates independently of the programmed pattern. This
Figure 10. Boundary Scan Register Circuit for I/O Pins
Table 3. I/O Shift Register Order
Table 4. ispGDX240VA Device ID Codes
Boundary Scan
ispGDX240VA
ispGDX240VA
DEVICE
DEVICE
(from previous
Shift DR
SCANIN
cell
TDI, TOE, Y2, Y3, RESET, Y1, Y0, I/O B20 .. B39, I/O C0 .. C39, I/O D0 .. D19, I/O B19 .. B0,
I/O A39.. A0, I/O D39 .. D20, TDO
0001, 0000, 0011, 0101, 0100, 0000, 0100, 0011
Clock DR
32-BIT BOUNDARY SCAN ID CODE
Registers
D
D
D
BSCAN
Q
Q
Q
Update DR
D
D
BSCAN
Latches
I/O SHIFT REGISTER ORDER
ID Code/GDX240VA
Q
Q
19
Reset
PROG_MODE
allows customers using boundary scan test to have full
test capability with only a single BSDL file.
The ispGDXVA devices are identified by the 32-bit JTAG
IDCODE register. The device ID assignments are listed
in Table 4.
Specifications ispGDX240VA
EXTEST
EXTEST
TOE
Function
Function
Normal
Normal
HIGHZ
OE
SCANOUT
(to next cell)
0
1
0
1
I/O Shift Reg Order/ispGDXVA
I/O Pin

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