AM79C978 Advanced Micro Devices, AM79C978 Datasheet - Page 136
AM79C978
Manufacturer Part Number
AM79C978
Description
Single-Chip 1/10 Mbps PCI Home Networking Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C978.pdf
(261 pages)
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CSR60: Previous Transmit Descriptor Address
Lower
Bit
31-16 RES
15-0
CSR61: Previous Transmit Descriptor Address
Upper
Bit
31-16 RES
15-0
CSR62: Previous Transmit Byte Count
Bit
31-16 RES
15-12 RES
11-0
136
PXDAL
PXDAU
PXBC
Name
Name
Name
Reserved locations. Written as
zeros and read as undefined.
Contains the lower 16 bits of the
previous transmit descriptor ad-
dress pointer. The Am79C978
controller has the capability to
stack multiple transmit frames.
Reserved locations. Written as
zeros and read as undefined.
Contains the upper 16 bits of the
previous transmit descriptor ad-
dress pointer. The Am79C978
controller has the capability to
stack multiple transmit frames.
Reserved locations. Written as
zeros and read as undefined.
Reserved locations.
Previous Transmit Byte Count.
This field is a copy of the BCNT
field of TMD1 of the previous
transmit descriptor.
These bits are read/write acces-
sible only when either the STOP
or the SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET, or STOP.
These bits are read/write acces-
sible only when either the STOP
or the SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET, or STOP.
These bits are read/write acces-
sible only when either the STOP
or the SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET, or STOP.
Description
Description
Description
Am79C978
CSR63: Previous Transmit Status
Bit
31-16 RES
15-0
CSR64: Next Transmit Buffer Address Lower
Bit
31-16 RES
15-0
CSR65: Next Transmit Buffer Address Upper
Bit
31-16 RES
15-0
Name
PXST
NXBAL
NXBAU
Name
Name
Description
Reserved locations. Written as
zeros and read as undefined.
Previous Transmit Status. This
field is a copy of bits 31-16 of
TMD1 of the previous transmit
descriptor.
These bits are read/write acces-
sible only when either the STOP
or the SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET, or STOP.
Reserved locations. Written as
zeros and read as undefined.
Contains the lower 16 bits of the
next transmit buffer address from
which the Am79C978 controller
will transmit an outgoing frame.
These bits are read/write accessi-
ble only when either the STOP or
the SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET, or STOP.
Reserved locations. Written as
zeros and read as undefined.
Contains the upper 16 bits of the
next transmit buffer address from
which the Am79C978 controller
will transmit an outgoing frame.
These bits are read/write acces-
sible only when either the STOP
or the SPND bit is set. These bits
are unaffected by H_RESET,
S_RESET, or STOP.
Description
Description
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