M36L0R7050 ST Microelectronics, M36L0R7050 Datasheet - Page 7

• Manufacturer Part Number: M36L0R7050
• Description: 128 Mbit (Multiple Bank / Multi-Level / Burst) Flash Memory 32 Mbit (2M x16) PSRAM
• Manufacturer: ST Microelectronics

It is not allowed to set E
at V
PSRAM Output Enable (G
able, G
allowing fast read/write cycles to be achieved with
the common I/O data bus.
PSRAM Write Enable (W
W
PSRAM Upper Byte Enable (UB
Byte Enable, UB
Byte Data Inputs/Outputs (DQ8-DQ15) to or from
the upper part of the selected address during a
Write or Read operation.
PSRAM Lower Byte Enable (LB
Byte Enable, LB
Byte Data Inputs/Outputs (DQ0-DQ7) to or from
the lower part of the selected address during a
Write or Read operation.
V
supply to the internal cores of the Flash memory
component. It is the main power supply for all
Flash operations (Read, Program and Erase).
V
age supplies the power for all PSRAM operations
(Read, Write, etc.) and for driving the refresh logic,
even when the device is not being accessed.
V
supply for the Flash Memory I/O pins. This allows
all Outputs to be powered independently of the
Flash Memory core power supply, V
DDF
DDP
DDQ
P
, controls the Bus Write operation of the device.
IH
Supply Voltage. V
Supply Voltage. The V
Supply Voltage. V
at the same time.
P
, provides a high speed tri-state control,
P
P
, gates the data on the Lower
, gates the data on the Upper
F
at V
DDF
P
DDQ
). The Write Enable,
P
IL,
). The Output En-
provides the power
provides the power
E1
DDP
P
P
P
). The Lower
at V
). The Upper
DDF
Supply Volt-
IL
.
and E2
P
V
Flash control input and a Flash power supply pin.
The two functions are selected by the voltage
range applied to the pin.
If V
V
age lower than V
tion against Program or Erase, while V
enables these functions (see Tables
Characteristics for the relevant values). V
only sampled at the beginning of a Program or
Erase; a change in its value after the operation has
started does not have any effect and Program or
Erase operations continue.
If V
supply pin. In this condition V
until the Program/Erase algorithm is completed.
V
ence for all voltage measurements in the Flash
(core and I/O Buffers) and PSRAM chips.
Note: Each Flash memory device in a system
should have their supply voltage (V
the program supply voltage V
with a 0.1µF ceramic capacitor close to the pin
(high frequency, inherently low inductance ca-
pacitors should be as close as possible to the
package). See
Load
sufficient to carry the required V
and erase currents.
PPF
PPF
SS
PPF
PPF
Ground. V
is seen as a control input. In this case a volt-
Program Supply Voltage. V
Circuit. The PCB track widths should be
is kept in a low voltage range (0V to V
is in the range of V
M36L0R7050T0, M36L0R7050B0
SS
PPLKF
Figure 6., AC Measurement
is the common ground refer-
gives an absolute protec-
PPHF
PPF
it acts as a power
PPF
must be stable
PPF
PPF
7
PPF
decoupled
and 8, DC
DDF
is both a
program
> V
PPF
) and
DDQ
PP1F
7/18
is
)