MT8LSDT3264A Micron Technology, MT8LSDT3264A Datasheet - Page 19

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MT8LSDT3264A

Manufacturer Part Number
MT8LSDT3264A
Description
SYNCHRONOUS DRAM MODULE
Manufacturer
Micron Technology
Datasheet
Table 18: EEPROM Device Select Code
The most significant bit (b7) is sent first
Table 19: EEPROM Operating Modes
Table 20: SERIAL Presence-Detect EEPROM DC Operating Conditions
V
32,64 Meg x 64 SDRAM DIMMs
SD8_16C32_64x64AG_C.fm - Rev. C 11/02
MODE
PARAMETER/CONDITION
Memory Area Select Code (two arrays)
Protection Register Select Code
Current Address Read
RandomAddressRead
Sequential Read
Byte Write
Page Write
SUPPLY VOLTAGE
INPUT HIGH VOLTAGE: Logic 1; All inputs
INPUT LOW VOLTAGE: Logic 0; All inputs
OUTPUT LOW VOLTAGE: I
INPUT LEAKAGE CURRENT: V
OUTPUT LEAKAGE CURRENT: V
STANDBY CURRENT: SCL = SDA = V
inputs = GND or 3.3V ±10%
POWER SUPPLY CURRENT:
SCL Clock frequency = 100 KHz
DD
= +3.3V ±0.3V; All voltages referenced to V
OUT
= 3mA
IN
= GND to V
OUT
RW BIT
= GND to V
DD
1
0
1
1
0
0
- 0.3V; All other
DD
b7
1
0
DEVICE TYPE IDENTIFIER
DD
V
V
V
V
SS
IH
IH
IH
IH
WC
V
V
or V
or V
or V
or V
IL
IL
b6
0
1
IL
IL
IL
IL
BYTES
£ 16
19
³ 1
1
1
1
b5
SYMBOL
1
1
I
I
CC
CC
V
V
I
V
V
I
CCS
Write
I
LO
Read
DD
OL
LI
IH
IL
Start, Device Select, RW = 1
Start, Device Select, RW= 0, Address
RESTART, Device Select, RW= 1
Similar to Current or Random Address Read
START, Device Select, RW = 0
START, Device Select, RW = 0
Micron Technology, Inc., reserves the right to change products or specifications without notice.
b4
0
0
SA2
SA2
b3
V
CHIP ENABLE
168-PIN SDRAM DIMMs
DD
MIN
256MB / 512MB (x64)
-1
3
x 0.7
INITIAL SEQUENCE
SA1
SA1
b2
V
V
DD
DD
SA0
SA0
MAX
b1
3.6
0.4
10
10
30
3
1
+ 0.5
x 0.3
RW
RW
RW
b0
©2002, Micron Technology Inc.
UNITS
mA
µA
µA
µA
V
V
V
V

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