EVAL-CONTROLBRD3 AD [Analog Devices], EVAL-CONTROLBRD3 Datasheet - Page 13

• Manufacturer Part Number: EVAL-CONTROLBRD3
• Description: 16-Bit, 100 kSPS PulSAR ADC in MSOP/QFN
• Manufacturer: AD [Analog Devices]

TYPICAL CONNECTION DIAGRAM
Figure 22 shows an example of the recommended application
diagram for the AD7683.
ANALOG INPUT
Figure 23 shows an equivalent circuit of the input structure of
the AD7683.
The two diodes, D1 and D2, provide ESD protection for the
analog inputs, +IN and −IN. Care must be taken to ensure that
the analog input signal never exceeds the supply rails by more
than 0.3 V, because this will cause these diodes to become for-
ward-biased and start conducting current. However, these
diodes can handle a forward-biased current of 130 mA maxi-
mum. For instance, these conditions could eventually occur
when the input buffer’s (U1) supplies are different from VDD.
In such a case, an input buffer with a short-circuit current
limitation can be used to protect the part.
This analog input structure allows the sampling of the
differential signal between +IN and −IN. By using this
differential input, small signals common to both inputs are
rejected. For instance, by using −IN to sense a remote signal
ground, ground potential differences between the sensor and
the local ADC ground are eliminated. During the acquisition
phase, the impedance of the analog input +IN can be modeled
as a parallel combination of the capacitor C
formed by the series connection of R
the pin capacitance. R
ponent made up of some serial resistors and the on-resistance
of the switches. C
OR –IN
GND
+IN
Figure 23. Equivalent Analog Input Circuit
IN
C
is typically 30 pF and is mainly the ADC
PIN
IN
VDD
is typically 600 Ω and is a lumped com-
D1
D2
NOTE 1: SEE REFERENCE SECTION FOR REFERENCE SELECTION.
NOTE 2: C
NOTE 3: SEE DRIVER AMPLIFIER CHOICE SECTION.
NOTE 4. OPTIONAL FILTER. SEE ANALOG INPUT SECTION.
0 TO V
REF
(NOTE 3)
REF
IN
and C
IS USUALLY A 10µF CERAMIC CAPACITOR (X5R).
R
IN
PIN
IN
and the network
. C
(NOTE 1)
REF
C
(NOTE 4)
PIN
2.7nF
IN
33Ω
is primarily
Figure 22. Typical Application Diagram
2.2 TO 10µF
(NOTE 2)
Rev. 0 | Page 13 of 16
+IN
–IN
GND
REF
AD7683
sampling capacitor. During the conversion phase, where the
switches are opened, the input impedance is limited to C
and C
aliasing effects and limits the noise.
When the source impedance of the driving circuit is low, the
AD7683 can be driven directly. Large source impedances signi-
ficantly affect the ac performance, especially THD. The dc
performances are less sensitive to the input impedance.
DRIVER AMPLIFIER CHOICE
Although the AD7683 is easy to drive, the driver amplifier
needs to meet the following requirements:
•
•
•
VDD
DCLOCK
The noise generated by the driver amplifier needs to be
kept as low as possible in order to preserve the SNR and
transition noise performance of the AD7683. Note that the
AD7683 has a noise much lower than most other 16-bit
ADCs and, therefore, can be driven by a noisier op amp
while preserving the same or better system performance.
The noise coming from the driver is filtered by the AD7683
analog input circuit 1-pole, low-pass filter made by R
C
For ac applications, the driver needs to have a THD
performance suitable to that of the AD7683. Figure 15
shows the THD versus frequency that the driver should
exceed.
For multichannel multiplexed applications, the driver
amplifier and the AD7683 analog input circuit must be able
to settle for a full-scale step of the capacitor array at a
16-bit level (0.0015%). In the amplifier’s data sheet, settling
at 0.1% to 0.01% is more commonly specified. This could
differ significantly from the settling time at a 16-bit level
and should be verified prior to driver selection.
IN
IN
D
make a 1-pole, low-pass filter that reduces undesirable
or by the external filter, if one is used.
OUT
CS
100nF
3-WIRE INTERFACE
2.7V TO 5.25V
AD7683
PIN
IN
. R
and
IN