HY29LV160TT-70 Hynix Semiconductor, HY29LV160TT-70 Datasheet

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HY29LV160TT-70

Manufacturer Part Number
HY29LV160TT-70
Description
Manufacturer
Hynix Semiconductor

Specifications of HY29LV160TT-70

Case
TSOP48
Date_code
2006+

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HY29LV160TT-70
Manufacturer:
HY
Quantity:
1 980
KEY FEATURES
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Preliminary
Revision 1.2, May 2001
– Read, program and erase operations from
– Ideal for battery-powered applications
– 70, 80, 90 and 120 ns access time
Values At 5 Mhz)
– Automatic sleep mode current: 1 µA
– Standby mode current: 1 µA
– Read current: 9 mA
– Program/erase current: 20 mA
– One 16 KB, two 8 KB, one 32 KB and
– One 8 KW, two 4 KW, one 16 KW and
– Top or bottom boot block configurations
– Allows locking of a sector or sectors to
– Sectors lockable in-system or via
– Temporary Sector Unprotect allows
– Sector erase time: 0.25 sec typical for
– Chip erase time: 8 sec typical
– Byte program time: 9 µs typical
– Reduces programming time when issuing
and Erases Any Combination of Sectors
or the Entire Chip
– Suspends an erase operation to allow
– Erase Resume can then be invoked to
Verifies Data at Specified Addresses
Single Power Supply Operation
High Performance
Ultra-low Power Consumption (Typical
Flexible Sector Architecture:
Sector Protection
Fast Program and Erase Times
Unlock Bypass Program Command
Automatic Erase Algorithm Preprograms
Erase Suspend/Erase Resume
Automatic Program Algorithm Writes and
2.7 to 3.6 volts
versions
thirty-one 64 KB sectors in byte mode
thirty-one 32 KW sectors in word mode
available
prevent program or erase operations
within that sector
programming equipment
changes in locked sectors (requires high
voltage on RESET# pin)
each sector
multiple program command sequences
reading data from, or programming data
to, a sector that is not being erased
complete suspended erasure
16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory
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LOGIC DIAGRAM
– Provide software confirmation of
– Provides hardware confirmation of
Device to Reading Array Data
Interface (CFI) Specification
– Flash device parameters stored directly
– Allows software driver to identify and use
– Pinout and software compatible with
– Superior inadvertent write protection
– 48-pin TSOP and 48-ball FBGA packages
100,000 Write Cycles per Sector Minimum
Data# Polling and Toggle Bits
Ready/Busy# Pin
Hardware Reset Pin (RESET#) Resets the
Compliant With Common Flash Memory
Compatible With JEDEC standards
Space Efficient Packaging
2 0
completion of program and erase
operations
completion of program and erase
operations
on the device
a variety of different current and future
Flash products
single-power supply Flash devices
A[19:0]
C E #
O E #
W E #
R E S E T #
B Y T E #
D Q 1 5 / A - 1
DQ[14:8]
R Y / B Y #
DQ[7:0]
HY29LV160
8
7

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