PPC405GP3DE200C AMCC (Applied Micro Circuits Corp), PPC405GP3DE200C Datasheet
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PPC405GP3DE200C
Manufacturer Part Number
PPC405GP3DE200C
Description
BGA
Manufacturer
AMCC (Applied Micro Circuits Corp)
Datasheet
1.PPC405GP-3FE200C.pdf
(54 pages)
Specifications of PPC405GP3DE200C
Date_code
05+
Features
Description
Designed specifically to address embedded
applications, the PowerPC 405GP (PPC405GP)
provides a high-performance, low-power solution that
interfaces to a wide range of peripherals by
incorporating on-chip power management features
and lower power dissipation requirements.
This chip contains a high-performance RISC
processor core, SDRAM controller, PCI bus interface,
Ethernet interface, control for external ROM and
peripherals, DMA with scatter-gather support, serial
AMCC
405GP
Power PC 405GP Embedded Processor
• PowerPC
• Synchronous DRAM (SDRAM) interface operating
• 4KB on-chip memory (OCM)
• External peripheral bus
• DMA support for external peripherals, internal
operating up to 266MHz
up to 133MHz
UART and memory
- 32-bit interface for non-ECC applications
- 40-bit interface serves 32 bits of data plus 8
- Flash ROM/Boot ROM interface
- Direct support for 8-, 16-, or 32-bit SRAM and
- Up to eight devices
- External Mastering supported
- Scatter-gather chaining supported
- Four channels
check bits for ECC applications
external peripherals
®
405 32-bit RISC processor core
ports, IIC interface, and general purpose I/O.
Technology: CMOS SA-12E, 0.25 μm
(0.18 μm L
Package: 456-ball (35mm or 27mm) enhanced plastic
ball grid array (E-PBGA)
Power (typical): TBDW at 133MHz, 1.5W at 200MHz,
• PCI Revision 2.2 compliant interface (32-bit, up to
• Ethernet 10/100Mbps (full-duplex) support with
• Programmable interrupt controller supports seven
• Programmable timers
• Two serial ports (16550 compatible UART)
• One IIC interface
• General purpose I/O (GPIO) available
• Supports JTAG for board level testing
• Internal processor local Bus (PLB) runs at SDRAM
• Supports PowerPC processor boot from PCI
66MHz)
media independent interface (MII)
external and 19 internal edge triggered or level-
sensitive interrupts
interface frequency
memory
- Synchronous or asynchronous PCI Bus
- Internal or external PCI Bus Arbiter
interface
eff
)
2W at 266MHz
Revision 2.05 – August 19, 2008
Data Sheet
Part Number 405GP
1