74HC573N,652 NXP Semiconductors, 74HC573N,652 Datasheet - Page 16

• Manufacturer Part Number: 74HC573N,652
• Description: IC LATCH OCTAL D 3STATE 20DIP
• Manufacturer: NXP Semiconductors
• Series: 74HCr

Specifications of 74HC573N,652

• Logic Type: D-Type Transparent Latch
• Package / Case: 20-DIP (0.300", 7.62mm)
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 2 V ~ 6 V
• Independent Circuits: 1
• Delay Time - Propagation: 14ns
• Current - Output High, Low: 7.8mA, 7.8mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Number Of Circuits: 8
• Logic Family: 74HC
• Polarity: Non-Inverting
• High Level Output Current: - 7.8 mA
• Low Level Output Current: 7.8 mA
• Propagation Delay Time: 15 ns
• Supply Voltage (max): 6 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1478-5; 74HC573N; 933670690652

Philips Semiconductors
HCMOS family characteristics
FAMILY SPECIFICATIONS
AC CHARACTERISTICS
The “AC CHARACTERISTICS” table lists the guaranteed
limits when a device is tested under the conditions given in
the AC Test Circuits and Waveforms section.
TEST CIRCUITS
Good high-frequency wiring practices should be used in
test circuits. Capacitor leads should be as short as
possible to minimize ripples on the output waveform
transitions and undershoot. Generous ground metal
(preferably a ground-plane) should be used for the same
reasons. A V
decoupling capacitor should be provided
CC
at the test socket, also with short leads. Input signals
should have rise and fall times of 6 ns, a signal swing of
0 V to V
for 74HC and 0 V to 3 V for 74HCT; a 1.0 MHz
CC
square wave is recommended for most propagation delay
tests. The repetition rate must be increased for testing
f
. Two pulse generators are usually required for testing
max
such parameters as set-up time, hold time and removal
time. f
is also tested with 6 ns input rise and fall times,
max
with a 50% duty factor, but for typical f
as high as
max
60 MHz, there are no constraints on rise and fall times.
March 1988
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