N74F373D,623 NXP Semiconductors, N74F373D,623 Datasheet - Page 7
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N74F373D,623
Manufacturer Part Number
N74F373D,623
Description
IC DTYPE LATCH OCTAL 20SOIC
Manufacturer
NXP Semiconductors
Series
74Fr
Type
D-Typer
Datasheet
1.N74F374DB118.pdf
(13 pages)
Specifications of N74F373D,623
Logic Type
D-Type Transparent Latch
Package / Case
20-SOIC (7.5mm Width)
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
2ns
Current - Output High, Low
3mA, 24mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
F
Polarity
Non-Inverting
High Level Output Current
- 3 mA
Low Level Output Current
32 mA
Propagation Delay Time
5.3 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Current
60 mA
Number Of Bits
8
Number Of Elements
1
Latch Mode
Transparent
Technology
Bipolar
Package Type
SO
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
933739560623
N74F373D-T
N74F373D-T
N74F373D-T
N74F373D-T
Philips Semiconductors
AC SET-UP REQUIREMENTS
AC WAVEFORMS
For all waveforms, V
The shaded areas indicate when the input is permitted to change for
predictable output performance.
2002 Nov 20
CP V
Qn
Qn
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
E
su
su
h
h
w
su
su
h
h
w
w
Latch/flip-flop
Waveform 1. Propagation delay for clock input to output,
(H
(
(H
(
(H)
(H)
(L)
L
L
(H)
(L)
(H)
(L)
V
)
)
Waveform 2. Propagation delay for enable to output
M
M
)
)
clock pulse widths, and maximum clock frequency
t
t
PLH
PHL
Set-up time, HIGH or LOW level
Set-up time, HIGH or LOW level
Dn to E
Hold time, HIGH or LOW level
Dn to E
E Pulse width, HIGH
Dn to CP
Hold time, HIGH or LOW level
Dn to CP
CP Pulse width,
HIGH or LOW
t
t
w
w
(H)
(H)
M
V
V
and enable pulse width
= 1.5 V.
M
1/f
M
max
V
V
M
M
PARAMETER
t
w
(L)
V
V
t
t
PLH
M
M
PHL
V
V
M
M
74F373
74F374
SF00258
SF00259
CONDITION
Waveform 4
Waveform 4
Waveform 1
Waveform 5
Waveform 5
Waveform 5
TEST
7
Dn
E
C
Waveform 3. Propagation delay for data to output
MIN
L
1.0
3.0
3.0
3.5
2.0
2.0
3.5
4.0
0
0
0
Waveform 4. Data set-up time and hold times
= 50 pF, R
Qn
t
V
Dn
su
T
V
M
amb
V
(H)
CC
M
TYP
= +5.0 V
V
= +25 C
M
t
h
V
(H)
M
L
= 500
t
PLH
MAX
LIMITS
V
C
M
T
V
L
amb
MIN
CC
74F373/74F374
= 50 pF, R
1.0
3.0
3.0
4.0
2.0
2.0
3.5
4.0
0
0
0
= 0 C to +70 C
= +5.0 V
V
t
PHL
M
V
t
M
V
su
M
(L)
L
SF00260
= 500
MAX
10%
t
h
V
V
(L)
M
M
Product data
SF00261
UNIT
ns
ns
ns
ns
ns
ns